Metastability error reduction in signal converter systems

An analog-to-digital converter system, comprising:

• converter stages wherein:
• an initial one of said converter stages is configured to process each sample of successive samples of an analog input signal into respective digital bits and provide a corresponding residue signal;
• and
• the remainder of said converter stages are configured to process the residue signal of the preceding one of said stages into respective digital bits and, if not the last of said converter stages, provide a corresponding residue signal;
• and
• an alignment/correction logic configured to temporally align and redundantly reduce said digital bits to a corresponding digital code that corresponds to said sample;
• wherein said initial converter stage comprises:
• a set of comparators to provide, in response to an analog signal, said digital bits wherein each of said comparators provides first and second differential digital signals when said analog signal has respectively exceeded a respective threshold and failed to exceed said threshold;
• and
• for each of said comparators, a logic gate coupled to initiate a correction command in response to the absence of said first and second differential signals at the end of a predetermined decision period.