Electromagnetic interference eliminating apparatus
AssigneeUniversal Scientific Industrial Co., Ltd.
InventorsWei-Hao Yeh, Wen-Hung Wang
Life of this patent
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Abstract
An electromagnetic interference eliminating apparatus includes a multi-stage filter that is composed of inductors, capacitors and resistors, and an active filter. The multi-stage filter receives an input signal and provides an eliminating band to eliminate the noise in the input signal. The active filter is connected with the multi-stage filter for buffering the input signal that has been eliminated and exactly outputting an output signal.
Claims9
An electromagnetic interference eliminating apparatus, having an input terminal and an output terminal, comprising:
- a multi-stage filter connected with the input terminal for receiving an input signal and providing an eliminating band to eliminate noise in the input signal, wherein the multi-stage filter comprises:
- a first resistor having two terminals, wherein a first of the two terminals of the first resistor is connected with the input terminal;
- a Y-shaped inductor circuit having three terminals, wherein a first of the three terminals of the Y-shaped inductor circuit is connected with a second of the two terminals of the first resistor;
- a Y-shaped capacitor circuit having three terminals, wherein the three terminals of the Y-shaped capacitor circuit are connected with the three terminals of the Y-shaped inductor circuit in parallel;
- and
- an active filter connected with the multi-stage filter and the output terminal for buffering the input signal and exactly outputting an output signal to the output terminal.
An electromagnetic interference eliminating apparatus, having an input terminal and an output terminal, comprising:
- a first resistor having two terminals, wherein a first of the two terminals of the first resistor is connected with the input terminal;
- a serial connection inductor combination circuit having two terminals, wherein a first of the two terminals of the serial connection inductor combination circuit is connected with a second of the two terminals of the first resistor;
- a serial connection capacitor combination circuit having two terminals, wherein two terminals of the serial connection capacitor combination circuit are connected with two terminals of the serial connection inductor combination circuit in parallel;
- a serial connection capacitor and inductor combination circuit having two terminals and connected between the serial connection inductor combination circuit and the serial connection capacitor combination circuit;
- a second resistor having two terminals, wherein a first of the two terminals of the second resistor is connected with a second of the two terminals of the serial connection inductor combination circuit;
- a low pass capacitor having two terminals, wherein a first of the two terminals of the low pass capacitor is connected with the second of the two terminals of the serial connection inductor combination circuit and a second of the two terminals of the low pass capacitor is connected with a grounding terminal;
- and
- a unit gain buffer having two input terminals, wherein the first input terminal of the unit gain buffer is connected with a second of the two terminals of the second resistor and the second input terminal of the unit gain buffer is connected with the output terminal.
Dependencies are inferred from the claim text.