Method for dynamically tuning the clock frequency of an oscillator and corresponding oscillating system
AssigneeSTMicroelectronics S.r.l.
InventorsStefano Amato, Francesco Mannino, Massimiliano Picca, Mirko Scapin
Life of this patent
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Abstract
An oscillator system may include an oscillator block having a plurality of inputs and outputting a clock signal, a frequency divider block receiving the clock signal and outputting a divided clock signal, a tuning block receiving the divided clock signal and outputting a comparison signal, and a control block coupled to the tuning block. The control block may receive the comparison signal. The control block may include a configuration block for producing a plurality of outputs for the corresponding inputs of the oscillator block, and an Up/Down counter having outputs applied to the configuration block.
Claims17
An oscillator system comprising:
- an oscillator block having a plurality of inputs and outputting a clock signal;
- a frequency divider block receiving the clock signal and outputting a divided clock signal;
- a tuning block including an integrator for receiving the divided clock signal and a first reference value, and for integrating the divided clock signal using the first reference value, and outputting a comparison signal;
- and
- a control block coupled to said tuning block, said control block receiving the comparison signal and comprising
- a configuration block for producing a plurality of outputs for the corresponding inputs of said oscillator block, and
- an Up/Down counter having outputs applied to said configuration block.
An oscillator system comprising:
- an oscillator block having a plurality of inputs and outputting a clock signal;
- a multiplexer receiving the clock signal and a reference clock signal and outputting the reference clock signal during a calibration mode;
- a frequency divider block receiving an output of said multiplexer and outputting a divided clock signal;
- a tuning block including an integrator for receiving the divided clock signal and a first reference value, and for integrating the divided clock signal using the first reference value, and outputting a comparison signal;
- and
- a control block coupled to said tuning block, said control block receiving the comparison signal and comprising
- a configuration block for producing a plurality of outputs for the corresponding inputs of said oscillator block, and
- an Up/Down counter having outputs applied to said configuration block.
A method for dynamically tuning a clock frequency from by an oscillator comprising at least one oscillator block, the oscillator block having a plurality of inputs and outputting a clock signal, the method comprising:
- dividing the clock signal produced by the oscillator block with a frequency divider block;
- integrating the divided clock signal from the frequency divider block into an electric magnitude signal with a tuning block having an integrator using a received first reference value;
- comparing the electric magnitude signal with a reference signal in the tuning block;
- and
- applying a signal from the comparing to a control block comprising an Up/Down counter and a configuration block for the oscillator block, the applying for regulating values of the plurality of inputs.
Dependencies are inferred from the claim text.