Bias circuit with increased power supply rejection
AssigneeBroadcom Corporation
InventorSherif Galal
Life of this patent
Estimating the term…
Abstract
According to one exemplary embodiment, a power supply rejection bias circuit includes a first amplifier coupled to a second amplifier, where the first amplifier receives a reference voltage, and a feedback voltage of the bias circuit. The bias circuit further includes an output transistor driven by the output of the second amplifier, where the output transistor provides the output of the bias circuit and the feedback voltage. The bias circuit further includes a feedback resistor coupled between an input and an output of the second amplifier. According to this embodiment, the output of the second amplifier forms a non-dominant pole of the bias circuit and the output of the bias circuit forms a dominant pole of the bias circuit, thereby increasing power supply rejection of the bias circuit.
Claims17
A power supply rejection bias circuit comprising:
- a first amplifier coupled to a second amplifier, said first amplifier receiving a reference voltage, and a feedback voltage of said bias circuit;
- an output transistor driven by an output of said second amplifier, said output transistor providing an output of said bias circuit and said feedback voltage;
- a feedback resistor directly coupled between an input and said output of said second amplifier so as to cause said output of said second amplifier to form a non-dominant pole of said bias circuit and to cause said output of said bias circuit to form a dominant pole of said bias circuit, thereby increasing power supply rejection of said bias circuit.
A power supply rejection bias circuit comprising:
- a first amplifier coupled to a second amplifier, said first amplifier receiving a reference voltage, and a feedback voltage of said bias circuit;
- an output transistor driven by an output of said second amplifier, said output transistor providing an output of said bias circuit and said feedback voltage;
- a feedback resistor coupled between an input and said output of said second amplifier so as to cause said output of said second amplifier to form a non-dominant pole of said bias circuit and to cause said output of said bias circuit to form a dominant pole of said bias circuit, thereby increasing power supply rejection of said bias circuit;
- a feedback capacitor coupled across said feedback resistor.
A power supply rejection bias circuit comprising:
- a first amplifier coupled to a second amplifier, said first amplifier receiving a reference voltage, and a feedback voltage of said bias circuit;
- a FET having a gate driven by an output of said second amplifier, said FET providing an output of said bias circuit and said feedback voltage;
- a feedback resistor directly coupled between an input and said output of said second amplifier so as to cause said output of said second amplifier to form a non-dominant pole of said bias circuit and to cause said output of said bias circuit to form a dominant pole of said bias circuit, thereby increasing power supply rejection of said bias circuit.
Dependencies are inferred from the claim text.