Switched capacitor circuit capable of minimizing clock feedthrough effect and having low phase noise and method thereof
AssigneeMediatek Inc.
InventorEn-Hsiang Yeh
Life of this patent
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AssigneeMediatek Inc.
InventorEn-Hsiang Yeh
Estimating the term…
A switched capacitor circuit includes a positive side capacitor coupled to a first positive side node; a first positive side switch element for selectively coupling the first positive side node to a second node according to a first control signal; and a precharge circuit coupled to the first positive side node for precharging the first positive side node to a precharge voltage for a predetermined time when the first positive side switch element is switched off according to the first control signal, and then for charging the first positive side node to a charge voltage until the first positive side switch element is switched on according to the first control signal. By rapidly precharging the first positive side node, the clock feedthrough effect is eliminated and the locking period of the VCO is shortened. Afterwards by charging the first positive side node, the phase noise of the VCO is minimized.
A method for controlling a switched capacitor circuit having a capacitor coupled to a first positive side node, the method comprising the following steps:
A method for controlling a switched capacitor circuit used in an oscillator, the switched capacitor circuit having a capacitor coupled to a first positive side node and coupled to an oscillator node of the switched capacitor circuit, and the method comprising the following steps:
Dependencies are inferred from the claim text.