General purpose comparator with multiplexer inputs

A comparator circuitry included within a single chip integrated circuit device, comprising:

• a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode;
• a first analog multiplexer having an output connected to the first input of the comparator;
• and
• at least one control register associated with the comparator and the first multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling connection of one input of the first multiplexer to the output of the first multiplexer and programming the response time level of the comparator.

A comparator circuitry included within a single chip integrated circuit device, comprising:

• a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode;
• a first multiplexer having an output connected to the first input of the comparator and a plurality of inputs each connected to a different reference voltage;
• and
• at least one control register associated with the comparator and the first multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling connection of one of the reference voltages to the output of the first multiplexer and programming the response time level of the comparator.

A comparator circuitry included within a single chip integrated circuit device, comprising:

• a comparator for comparing a signal received on a first input to a signal received on a second input, wherein the comparator is configurable to a plurality of response time levels between a fast response time mode to a lower power, slower response time mode;
• a first multiplexer having an output connected to the first input of the comparator, at least one input of first multiplexer connected to a capacitive touch switch array;
• and
• at least one control register associated with the comparator and the first multiplexer for storing control values from a processing unit controlling operation of the integrated circuit device enabling connection of one input of the first multiplexer to the output of the first multiplexer and programming the response time level of the comparator.