Parallel configuration of programmable devices
AssigneeXilinx, Inc.
InventorWayne Edward Wennekamp
Life of this patent
Estimating the term…
Abstract
A system for configuring a plurality of programmable devices may include an external memory, a master programmable device, and at least one slave programmable device. The programmable devices may have a parallel data bus connected in a daisy chain fashion. The programmable devices may further include a chip select signal that is also connected in a daisy chain. Special instructions embedded in the configuration bitstream, which may be stored in the external memory, are used by the programmable devices to control the configuration process.
Claims10
A method for configuring a first programmable device in a chain of programmable devices, the method comprising:
- receiving a bitstream at a parallel data input of the first programmable device;
- receiving an instruction to enable a parallel output register of the first programmable device, the instruction including a count;
- enabling a parallel output register of the first programmable device in response to receiving the instruction;
- passing the bitstream received at the parallel data input through to a parallel data output of the first programmable device via the parallel output register;
- counting the number of bytes passed to the parallel data output;
- and
- monitoring the bitstream after reaching the count in the instruction.
A master programmable device for use in a chain of programmable devices comprising the master programmable device and a slave programmable device, the master programmable device comprising:
- a parallel data input port;
- a parallel data output port;
- at least one register coupled between the parallel data input port and the parallel data output port;
- a chip select output port;
- and
- configuration control circuitry coupled to the at least one register;
- wherein the configuration control circuitry enables the at least one register in response to receiving an enable parallel data output instruction at the parallel data input port.
Dependencies are inferred from the claim text.