Back to results
US 7,622,812 B2Granted
Semiconductor module
AssigneeCanon Kabushiki Kaisha
InventorsKoji Tsuduki, Takanori Suzuki
Life of this patent
Estimating the term…
Abstract
A semiconductor module includes a semiconductor chip sealed with an encapsulation resin prevented from overflowing from an inside of the outer edge by a wiring pattern extended portion extending from the wiring pattern along an outer edge of a solder resist pattern at an outside of the outer edge of the solder resist pattern.
Claims7
A semiconductor module comprising:
- a semiconductor chip;
- a substrate, on which the semiconductor chip is mounted, and on which a connecting portion, a wiring pattern connected to the semiconductor chip via the connecting portion, and a solder resist pattern are arranged;
- and
- an encapsulation resin for sealing the semiconductor chip,
- wherein the solder resist pattern has an aperture in which an area in which the semiconductor chip is mounted and the connecting portion are arranged, and has an outer edge surrounding an outer periphery of the area in which the semiconductor chip is mounted, so as to suppress overflowing of the encapsulation resin from inside of the outer edge, and the wiring pattern crosses the solder resist pattern, and
- wherein the semiconductor module further comprises a wiring pattern extended portion extending from the wiring pattern along the outer edge of the solder resist pattern at an outside of the outer edge of the solder resist pattern, and the semiconductor module is filled with the encapsulation resin up to the outer edge of the solder resist pattern, and up to an outer edge of the wiring pattern extended portion.
3 more elements
A semiconductor module comprising:
- a semiconductor chip;
- a substrate, on which the semiconductor chip is mounted, and on which a connecting portion, a wiring pattern connected to the semiconductor chip via the connecting portion, and a solder resist pattern are arranged;
- and
- an encapsulation resin for sealing the semiconductor chip,
- wherein the solder resist pattern has an aperture, in which an area in which the semiconductor chip is mounted and the connecting portion are arranged, and has an outer edge surrounding an outer periphery of the area in which the semiconductor chip is mounted, so as to suppress overflowing of the encapsulation resin from inside of the outer edge, and the wiring pattern crosses the solder resist pattern, and
- wherein a patterned portion has a stepped outer edge rising up from the substrate, the stepped outer edge being disposed outside of the outer edge of the solder resist pattern and in a vicinity of a position at which the wiring pattern crosses the solder resist pattern.
3 more elements
Dependencies are inferred from the claim text.