Method of making multi-chip electronic package with reduced line skew

A method of making an electronic package, said method comprising:

• providing first and second dielectric layers;
• forming first and second conductive layers each including a plurality of conductive lines on said first and second dielectric layers, respectively, to form a circuitized substrate, said first conductive layer being further formed to include a first pattern of at least twenty electrical component contact sites and a plurality of second patterns each of at least twenty electrical component contact sites substantially surrounding said first pattern of at least twenty electrical component contact sites and spaced from said first pattern of at least twenty electrical component contact sites;
• forming a first plurality of said conductive lines to interconnect selected ones of said contact sites of said first pattern of at least twenty electrical component contact sites with selected ones of said contact sites of said second patterns of electrical component contact sites such that selected ones of said first plurality of conductive lines include selected ones of said conductive lines of said first conductive layer and said conductive lines of said second conductive layer while selected ones of others of said first plurality of conductive lines are formed to include only conductive lines of said first conductive layer, said conductive lines of said second conductive layer being electrically coupled to said selected ones of said conductive lines of said first conductive layer, said selected ones of others of said first plurality of conductive lines interconnecting said selected ones of said contact sites of said first and second patterns being of substantially the same length;
• and
• positioning a plurality of electrical components on said first conductive layer of said circuitized substrate, each of said plurality of electrical components being electrically coupled to a respective one of said first and second patterns of electrical component contact sites and therefore to one another by said selected ones of others of said first plurality of conductive lines interconnecting said selected ones of said contact sites of said first and second patterns and which are of said substantially the same length, and
• electrically coupling each of said electrical components to a respective one of said patterns of electrical component contact sites and therefore to one another by said plurality of conductive lines of said substantially same length.