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US 7,622,333 B2Granted
Integrated circuit package system for package stacking and manufacturing method thereof
AssigneeSTATS ChipPAC, Ltd.
InventorsYoung Cheol Kim, Koo Hong Lee, Jae Hak Yee, Il Kwon Shim
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Abstract
A stackable multi-chip package system is provided including forming an external interconnect having a base and a tip, connecting a first integrated circuit die and the base, stacking a second integrated circuit die over the first integrated circuit die in an active side to active side configuration, connecting the second integrated circuit die and the base, and molding the first integrated circuit die, the second integrated circuit die, and the external interconnect partially exposed.
Claims5
A method of manufacturing a stackable multi-chip package system comprising:
- forming a L-shape external interconnect having a base and a tip;
- connecting a first integrated circuit die, having a first non-active side and a first active side, and an inner portion of the base;
- stacking a second integrated circuit die, having a second non-active side and a second active side, over the first integrated circuit die in an offset and active side to active side configuration including positioning a second L-shape external interconnect having a second base coplanar with the tip;
- connecting the second integrated circuit die and the inner portion of the second base;
- and
- molding an encapsulation on the first integrated circuit die, the second integrated circuit die, and the L-shape external interconnects with a portion of the L-shape external interconnects, the first non-active side, and the second non-active side exposed including having the base and the tip coplanar with the encapsulation.
3 more elements
Dependencies are inferred from the claim text.