Mechanical integrity evaluation of low-k devices with bump shear
AssigneeFreescale Semiconductor, Inc.
InventorsPeng Su, Scott K. Pozder, David G. Wontor, Jie-Hua Zhao
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AssigneeFreescale Semiconductor, Inc.
InventorsPeng Su, Scott K. Pozder, David G. Wontor, Jie-Hua Zhao
Estimating the term…
A bump shear test is disclosed for evaluating the mechanical integrity of low-k interconnect stacks in an integrated circuit which includes a die test structure (11) having a stiff structural component (501, 502) positioned above and affixed to a conductive metal pad (103) formed in a last metal layer (104). The die test structure (11) may also include a dedicated support structure (41) below the conductive metal pad which includes a predetermined pattern of metal lines formed in the interconnect layers (18, 22, 26). After mounting the integrated circuit in a test device, a shear knife (601) is positioned for lateral movement to cause the shear knife to contact the stiff structural component (501). Any damage to the die test structure caused by the lateral movement of the shear knife may be assessed to evaluate the mechanical integrity of the interconnect stack.
A bump shear testing method for evaluating a semiconductor structure for mechanical integrity, comprising:
A method of testing a mechanical integrity measure of a low-k interconnect stack, the method comprising:
Dependencies are inferred from the claim text.