A/D converter preventing results of A/D conversion from being overwritten
AssigneesFujitsu Microelectronics Limited, Fujitsu Electronics Inc.
InventorMasahito Ishizawa
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AssigneesFujitsu Microelectronics Limited, Fujitsu Electronics Inc.
InventorMasahito Ishizawa
Estimating the term…
An A/D converter capable of generating an interrupt for requesting a control circuit to read the results of A/D conversion, in desired timing. Analog signals input from channels selected by a channel-selecting section are input to an A/D conversion section, and are sequentially A/D-converted. The results of A/D conversion are sequentially stored in different stages of a FIFO. A stage number-counting section counts the number of the stages of the FIFO where the results of A/D conversion are stored. An interrupt signal-delivering section outputs an interrupt signal for requesting a CPU to read the results of A/D conversion when the number of stages counted by the stage number-counting section is equal to an interrupt-generating stage number set by an interrupt-generating stage number-setting section.
An A/D converter for A/D-converting analog signals input from a plurality of channels, comprising:
Dependencies are inferred from the claim text.