# US 7,614,027 B2 · Methods for forming a MRAM with non-orthogonal wiring

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- Number: US 7,614,027 B2
- Document ID: US7614027B2
- Status: Granted
- Kind: B2
- Application number: 11/383,905
- Filed: 2006-05-17
- Published: 2006-09-21
- Granted: 2009-11-03
- Earliest claimed: 2002-08-08
- Assignees: Micron Technology, Inc.
- Inventors: Paul A. Farrar
- Web page: https://patentgrep.com/patent/US7614027B2

## CPC

- G03F 1/20: Masks or mask blanks for imaging by charged particle beam [CPB] radiation, e.g. by electron beam; Preparation thereof
- B82Y 10/00: Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
- B82Y 40/00: Manufacture or treatment of nanostructures
- G03F 1/78: by charged particle beam [CPB], e.g. electron beam patterning of masks
- G03F 7/70383: {Direct write, i.e. pattern is written directly without the use of a mask by one or multiple beams (maskless lithography using a programmable mask G03F7/70291)}
- G03F 7/70533: {Controlling abnormal operating mode, e.g. taking account of waiting time, decision to rework or rework flow}
- H01J 37/3174: {Particle-beam lithography, e.g. electron beam lithography}
- H10B 61/00: Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10D 89/10: Integrated device layouts
- H01J 2237/30488: Raster scan
- Y02P 90/02: Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)
- B82Y: SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- H01J: ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS (spark-gaps H01T; electric arc lamps H05B31/00; particle accelerators H05H)
- H10B: ELECTRONIC MEMORY DEVICES
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

The present subject matter allows non-orthogonal lines to be formed at the same thickness as the orthogonal lines so as to promote compact designs, to be formed with even line edges, and to be formed efficiently. Various method embodiments relate to forming a magnetic random access memory (MRAM) array. Various embodiments include forming a first wiring layer of approximately parallel conductors, a second wiring layer of approximately parallel conductors and a third wiring layer of approximately parallel conductors such that the first, second and third wiring layers cross at a number of intersections. At least one of the first, second and third wiring layers are formed so as to be non-orthogonal with respect to a remaining at least one of the first, second and third wiring layers. The method further includes forming a layer of magnetic storage elements proximately located to the intersections. Other aspects are provided herein.

## Claims

### Claim 1

A method for forming a magnetic random access memory (MRAM) array, comprising:
forming a first wiring layer of approximately parallel word conductors, a second wiring layer of approximately parallel bit conductors and a third wiring layer of approximately parallel select conductors such that the word, bit and select conductors in the first, second and third wiring layers cross at a number of intersections;
at least one of the first, second and third wiring layers being formed so as to be non-orthogonal with respect to a remaining at least one of the first, second and third wiring layers; and
forming a layer of magnetic storage elements, wherein the magnetic storage elements are proximately located to the intersections and are magnetically coupled to magnetic fields generated when current flows in word lines, when current flows in bit lines, and when current flows in select lines, wherein a desired magnetic storage element is written using three magnetic fields, wherein the three magnetic fields used to write the desired magnetic storage element include a first magnetic field produced by an energized word conductor in the first wiring layer, a second magnetic field produced by an energized bit conductor in the second wiring layer, and a third magnetic field produced by an energized select conductor in the third wiring layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the MRAM array is formed in a wafer, the method further comprising forming a number of alignment markings on the wafer.

### Claim 3 (depends on 2)

The method of claim 2, wherein forming the number of alignment markings on the wafer includes forming the number of alignment marking when forming the first wiring layer.

### Claim 4 (depends on 1)

The method of claim 1, wherein the MRAM array is formed in a wafer, the method further comprising rotating the wafer between at least two wiring layers.

### Claim 5 (depends on 4)

The method of claim 4, wherein forming the layer of magnetic storage elements includes forming the layer of magnetic storage elements after forming the first wiring layer and before forming the second wiring layer.

### Claim 6 (depends on 5)

The method of claim 5, further comprising forming an insulator layer after forming the second wiring layer and before forming the third wiring layer.

### Claim 7 (depends on 1)

The method of claim 1, wherein forming the layer of magnetic storage elements includes forming magnetoresistance devices electrically coupled to two of the wiring layers.

### Claim 8

A method for forming a magnetic random access memory (MRAM) array, comprising:
forming a first wiring layer of approximately parallel word conductors on a wafer using a first data set when a work piece is at a first rotational position θ1;
forming a second wiring layer of approximately parallel bit conductors on the wafer using a second data set when the work piece is at a second rotational position θ2 such that the bit conductors of the second wiring layer cross with the word conductors of the first wiring layer at a number of intersections, wherein the second wiring layer is non-orthogonal to the first wiring layer;
forming a third wiring layer of approximately parallel select conductors such that the select conductors of the third wiring layer cross the word conductors of the first wiring layer and the bit conductors of the second wiring layer at the number of intersections; and
forming a layer of magnetic storage elements, wherein the magnetic storage elements are proximately located to the intersections and are magnetically coupled to magnetic fields generated when current flows in word lines, when current flows in bit lines, and when current flows in select lines, wherein a desired magnetic storage element is written using three magnetic fields, wherein the three magnetic fields used to write the desired magnetic storage element include a first magnetic field produced by an energized word conductor in the first wiring layer, a second magnetic field produced by an energized bit conductor in the second wiring layer, and a third magnetic field produced by an energized select conductor in the third wiring layer.

### Claim 9 (depends on 8)

The method of claim 8, wherein forming the layer of magnetic storage elements includes forming the layer of magnetic storage elements after forming the first wiring layer and before forming the second wiring layer.

### Claim 10 (depends on 9)

The method of claim 9, further comprising forming an insulator layer after forming the second wiring layer and before forming the third wiring layer.

### Claim 11 (depends on 8)

The method of claim 8, wherein forming the third wiring layer includes forming the third wiring layer using a third data set when the work piece is at a third rotational position θ3.

### Claim 12 (depends on 8)

The method of claim 8, wherein forming the layer of magnetic storage elements includes forming magnetoresistance devices electrically coupled to two of the wiring layers.

### Claim 13 (depends on 8)

The method of claim 8, wherein forming the second wiring layer includes registering the wafer using a number of alignment markings.

### Claim 14 (depends on 13)

The method of claim 13, further comprising forming the alignment markings when forming the first wiring layer.

### Claim 15 (depends on 13)

The method of claim 13, wherein forming the first wiring layer includes registering the wafer using the number of alignment markings.

### Claim 16

A method for forming a magnetic random access memory (MRAM) array, comprising:
forming a first wiring layer of approximately parallel word conductors using a first reticle;
forming a second wiring layer of approximately parallel bit conductors using a second reticle such that the bit conductors of the second wiring layer cross with the word conductors of the first wiring layer at a number of intersections;
forming a third wiring layer of approximately parallel select conductors using a third reticle such that the select conductors of the third wiring layer cross the word conductors of the first wiring layer and the bit conductors of the second wiring layer at the number of intersections; and
forming a layer of magnetic storage elements, wherein the magnetic storage elements are proximately located to the intersections and are magnetically coupled to magnetic fields generated when current flows in word lines, when current flows in bit lines, and when current flows in select lines,
wherein at least one of the first wiring layer, the second wiring layer and the third wiring layer is formed so as to be non-orthogonal with respect to a remaining at least one of the first wiring layer, the second wiring layer and the third wiring layer, and
wherein a desired magnetic storage element is written using three magnetic fields, wherein the three magnetic fields used to write the desired magnetic storage element include a first magnetic field produced by an energized word conductor in the first wiring layer, a second magnetic field produced by an energized bit conductor in the second wiring layer, and a third magnetic field produced by an energized select conductor in the third wiring layer.

### Claim 17 (depends on 16)

The method of claim 16, wherein:
the first reticle is created at a first rotational position θ1;
the second reticle is created at a second rotational position θ2;
the third reticle is created at a third rotational position θ3;
the first rotational position θ1 and the second rotational position θ2 are such that a set of parallel lines in the first wiring layer form an angle of approximately 60° with respect to a set of parallel lines in the second wiring layer; and
the second rotational position θ2 and the third rotational position θ3 are such that the set of parallel lines in the second wiring layer form an angle of approximately 60° with respect to a set of parallel lines in the third wiring layer.

### Claim 18 (depends on 17)

The method of claim 17, wherein the second reticle is properly aligned at the second rotational position θ2 and the third reticle is properly aligned at the third rotational position θ3 using a number of alignment markings.

### Claim 19

A magnetic random access memory (MRAM) array formed by a method, comprising:
forming a first wiring layer of approximately parallel word conductors using a first reticle;
forming a second wiring layer of approximately parallel bit conductors using a second reticle such that the bit conductors of the second wiring layer cross with the word conductors of the first wiring layer at a number of intersections;
forming a third wiring layer of approximately parallel select conductors using a third reticle such that the select conductors of the third wiring layer cross the word conductors of the first wiring layer and the bit conductors of the second wiring layer at the number of intersections; and
forming a layer of magnetic storage elements, wherein the magnetic storage elements are proximately located to the intersections and are magnetically coupled to magnetic fields generated when current flows in word lines, when current flows in bit lines, and when current flows in select lines,
wherein at least one of the first wiring layer, the second wiring layer and the third wiring layer is formed so as to be non-orthogonal with respect to a remaining at least one of the first wiring layer, the second wiring layer and the third wiring layer, and
wherein a desired magnetic storage element is written using three magnetic fields, wherein the three magnetic fields used to write the desired magnetic storage element include a first magnetic field produced by an energized word conductor in the first wiring layer, a second magnetic field produced by an energized bit conductor in the second wiring layer, and a third magnetic field produced by an energized select conductor in the third wiring layer.

### Claim 20 (depends on 19)

The MRAM array of claim 19, wherein the magnetic storage elements includes magnetoresistance devices electrically coupled between two of the wiring layers.