# US 7,613,346 B2 · Compositing in multiple video processing unit (VPU) systems > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,613,346 B2 - Document ID: US7613346B2 - Status: Granted - Kind: B2 - Application number: 11/140,165 - Filed: 2005-05-27 - Published: 2006-11-30 - Granted: 2009-11-03 - Earliest claimed: 2005-05-27 - Assignees: ATI Technologies, Inc. - Inventors: James Hunkins; Raja Koduri - Web page: https://patentgrep.com/patent/US7613346B2 ## CPC - G06F 15/16: Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs {(coordinating program control therefor G06F9/52; in regulating and control system G05B)} - G06F 3/14: Digital output to display device {; Cooperation and interconnection of the display device with other functional units} - G09G 5/363: {Graphics controllers} - G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)} - G09G 2360/06: Use of more than one graphics processor to process data before displaying to one or more screens - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. Additionally, an interlink module is coupled to receive processed data corresponding to the frames from each of the multiple processors. The interlink module selects pixels of the frames from the processed data of one of the processors based on a predetermined pixel characteristic and outputs the frames that include the selected pixels. ## Claims ### Claim 1 A system comprising: a plurality of processors that each couple to receive commands and data that correspond to frames of video that comprise a plurality of pixels; and an interface module coupled to receive processed data corresponding to the frames from each of the plurality of processors, the interface module selecting pixels of the frames from the processed data of one of the processors based on a predetermined pixel characteristic and outputting a frame that includes the selected pixels. ### Claim 2 (depends on 1) The system of claim 1, wherein the plurality of processors includes a plurality of video processing units (VPU). ### Claim 3 (depends on 1) The system of claim 1, further comprising at least one driver coupled to inputs of the processors and coupled to an output of at least one application. ### Claim 4 (depends on 3) The system of claim 3, wherein the driver sets the predetermined pixel characteristic of pixels of another of the processors to a first value in response to the selecting pixels of the frames from the processed data of one of the processors. ### Claim 5 (depends on 1) The system of claim 1, wherein the predetermined pixel characteristic is a pixel color. ### Claim 6 (depends on 1) The system of claim 1, further comprising at least one register that includes at least one pixel value that determines the pixel characteristic. ### Claim 7 (depends on 6) The system of claim 6, further comprising logic circuitry coupled to the processors and the register, the logic circuitry controlling the selecting pixels of the frames from the processed data of one of the processors in response to the pixel value. ### Claim 8 (depends on 7) The system of claim 7, wherein the selecting includes comparing a first pixel characteristic of a pixel from a first VPU to the pixel value, and selecting the first pixel when the first pixel characteristic is different from the pixel value and selecting a second pixel from the second VPU when the first pixel characteristic matches the pixel value. ### Claim 9 (depends on 8) The system of claim 8, wherein outputting a frame includes mixing the received data and forming an output video stream that includes the selected one of the first and second pixels. ### Claim 10 A video processing apparatus, comprising: circuitry configurable to process video data associated with a pre-assigned portion of a video frame and to output pixels generated using the video data, including video data not associated including video data not associated with the pre-assigned portion of the video frame; and circuitry configured to receive the output pixels associated and to select pixels associated with the pre-assigned portion of the video frame for further processing based on a pixel parameter value, and to discard pixels not associated and to select pixels associated with the pre-assigned portion of the video frame based on the pixel parameter.