# US 7,612,836 B2 · Liquid crystal display device and fabrication method thereof

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- Number: US 7,612,836 B2
- Document ID: US7612836B2
- Status: Granted
- Kind: B2
- Application number: 11/168,544
- Filed: 2005-06-29
- Published: 2006-03-09
- Granted: 2009-11-03
- Earliest claimed: 2004-09-09
- Assignees: LG Display Co., Ltd.
- Inventors: Yong In Park; Dea Yun Lee
- Web page: https://patentgrep.com/patent/US7612836B2

## CPC

- H10D 86/60: wherein the TFTs are in active matrices
- G02F 1/136286: {Wiring, e.g. gate line, drain line}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- G02F 1/136213: {Storage capacitors associated with the pixel electrode}
- G02F 1/136231: {for reducing the number of lithographic steps}
- G02F 1/136295: {Materials; Compositions; Manufacture processes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS

## Abstract

A method for fabricating an LCD device comprising: providing first and second substrates; forming an active area having a source region, a drain region, a channel region, and a storage region on the first substrate; forming a first insulation film on the first substrate; forming a gate electrode, a gate line and a pixel electrode on the first substrate and forming a storage line partially overlapping with the storage region; forming a second insulation film on the first substrate; forming first and second contact holes exposing a portion of the source and drain regions by removing a portion of the first and second insulation films and exposing the pixel electrode by removing the second insulation film on the pixel electrode; and forming a source electrode electrically connected to the source region through the first contact hole and forming a drain electrode electrically connected to the drain region through the second contact hole and partially overlapping with the storage line.

## Claims

### Claim 1

A method for fabricating an LCD device comprising:
providing first and second substrates;
forming an active area having a source region, a drain region, a channel region, and a storage region on the first substrate;
forming a first insulation film on the first substrate;
forming a gate electrode, a gate line and a pixel electrode on the substrate and forming a storage line partially overlapping with the storage region,
wherein the storage region of the active area is positioned between the gate line and a lower end of the pixel electrode,
wherein the storage region of the active area does not overlap with the pixel electrode, and
wherein the storage line is substantially parallel to the gate line;
forming a second insulation film on the first substrate;
forming first and second contact holes exposing a portion of the source and drain regions by removing a portion of the first and second insulation films and exposing the pixel electrode by removing the second insulation film on the pixel electrode; and
forming a source electrode electrically connected to the source region through the first contact hole and forming a drain electrode electrically connected to the drain region through the second contact hole and partially overlapping with the storage line,
wherein the drain electrode extends toward the pixel electrode by crossing an upper portion of the storage line.

### Claim 2 (depends on 1)

The method of claim 1, wherein the active area is formed of a silicon layer.

### Claim 3 (depends on 2)

The method of claim 2, wherein the silicon layer is formed of a crystallized silicon layer.

### Claim 4 (depends on 1)

The method of claim 1, wherein forming the gate electrode, the gate line, and the pixel electrode comprises:
forming first and second conductive films on the first substrate; and
patterning the first and second conductive films to form a gate electrode, a gate line, a storage line, and a pixel electrode.

### Claim 5 (depends on 4)

The method of claim 4, wherein the gate electrode, the gate line, and the storage line have a dual layer structure and the pixel electrode has a single layer structure of the first conductive film.

### Claim 6 (depends on 4)

The method of claim 4, wherein one of the first and second conductive film is formed of one of indium tin oxide (ITO) and indium zinc oxide (IZO).

### Claim 7 (depends on 4)

The method of claim 4, wherein the second conductive film is formed of one of aluminum, an aluminum alloy, tungsten, copper, chromium and molybdenum.

### Claim 8 (depends on 1)

The method of claim 1, wherein the contact holes are formed using a contact hole mask that includes a mask pattern for exposing the pixel electrode.

### Claim 9 (depends on 8)

The method of claim 8, wherein the second insulation film on the pixel electrode is removed using the contact hole mask.

### Claim 10 (depends on 8)

The method of claim 8, wherein the second conductive film on the pixel electrode is removed to expose the pixel electrode after removing the first and second insulation films.

### Claim 11 (depends on 1)

The method of claim 1, wherein the storage line is formed in an upper portion of the storage region and partially overlaps the storage region with the first insulation film interposed therebetween to form a first storage capacitor.

### Claim 12 (depends on 1)

The method of claim 1, wherein the drain electrode electrically connects to the drain region and the pixel electrode.

### Claim 13 (depends on 1)

The method of claim 1, wherein the drain electrode crosses an upper portion of the storage line and a portion overlaps with the storage line with the second insulation film interposed therebetween to form a second storage capacitor.

### Claim 14 (depends on 1)

The method of claim 1, further comprising implanting impurity ions into a region of the active area using the gate electrode as a mask to form the source and drain regions.

### Claim 15 (depends on 14)

The method of claim 14, wherein the impurity ions include at least one of a Group III and a Group V element.

### Claim 16 (depends on 15)

The method of claim 15, wherein the Group III element includes boron (B) and the Group V element includes phosphorous (P).

### Claim 17 (depends on 1)

The method of claim 1, further comprising forming a liquid crystal layer between the first and second substrates.