# US 7,612,615 B1 · Dual supply amplifier > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,612,615 B1 - Document ID: US7612615B1 - Status: Granted - Kind: B1 - Application number: 12/137,727 - Filed: 2008-06-12 - Granted: 2009-11-03 - Earliest claimed: 2008-06-12 - Assignees: Mediatek Inc. - Inventors: Chun-chih Hou - Web page: https://patentgrep.com/patent/US7612615B1 ## CPC - H03F 1/0211: {with control of the supply voltage or current} - H03F 3/187: in integrated circuits - H03F 3/3022: {CMOS common source output SEPP amplifiers (H03F3/3008 takes precedence)} - H03F 2200/03: the amplifier being designed for audio applications - H03F 2200/411: the output amplifying stage of an amplifier comprising two power stages - H03F 2200/511: Many discrete supply voltages or currents or voltage levels can be chosen by a control signal in an IC-block amplifier circuit - H03F 2200/54: Two or more capacitor coupled amplifier stages in cascade - H03F: AMPLIFIERS ## Abstract A dual supply amplifier without using an inter-stage capacitor is disclosed. The dual supply amplifier has an input stage coupled to a lower supply voltage VDD1 for generating a voltage signal V3 proportion to a difference between a pair of inputs. A conversion stage is coupled a higher supply voltage VDD2 and a third supply voltage VDD3, which can be ground or a negative potential, for generating a signal V1 with reference to VDD2 and a signal V2 with reference to VDD3. An output stage receives V1 and V2 for generating an output signal Vo with a swing between VDD2 and VDD3. ## Claims ### Claim 1 A dual supply amplifier comprising: an input stage coupled to a first supply voltage, the input stage receiving a pair of input signals for generating a first voltage signal with a magnitude proportional to a difference of the pair of input signals; a conversion stage coupled to the first supply voltage, a second supply voltage and a third supply voltage, the third supply voltage being lower than the first and second supply voltages, the conversion stage receiving the first voltage signal from the input stage for generating a second voltage signal with reference to the second supply voltage and a third voltage signal with reference to the third supply voltage; and an output stage coupled to the second supply voltage and the third supply voltage, the output stage receiving the second voltage signal and the third voltage signal for generating an output signal with a swing between the second supply voltage and the third supply voltage. ### Claim 2 (depends on 1) The dual supply amplifier of claim 1, wherein the third supply voltage is a ground potential. ### Claim 3 (depends on 2) The dual supply amplifier of claim 2, wherein the output stage is coupled to a capacitor at an output node. ### Claim 4 (depends on 1) The dual supply amplifier of claim 1, wherein the third supply voltage is a negative potential. ### Claim 5 (depends on 4) The dual supply amplifier of claim 4, wherein the output stage is capable of directly connecting to a headphone. ### Claim 6 (depends on 4) The dual supply amplifier of claim 4, wherein the third supply voltage is generated by a DC-to-DC converter. ### Claim 7 (depends on 1) The dual supply amplifier of claim 1, wherein the conversion stage comprises a V to I converter coupled to the first supply voltage for converting the first voltage signal into a first current signal with a magnitude proportional to the first voltage signal, a current mirror coupled to the third supply voltage, receiving the first current signal for providing a second current signal and a third current signal with magnitudes proportional to the first current signal, and an amplifier coupled to the second supply voltage for providing a pair of differential output currents, the differential output currents and the second and third current signals are used to determine the magnitudes of the second and third voltage signals. ### Claim 8 (depends on 7) The dual supply amplifier of claim 7, wherein the conversion stage further has a first transistor for sensing the third voltage signal and providing a fourth current signal to be compared with a reference current by the amplifier, and the amplifier adjusts the differential output currents according to the comparison result so as to adjust the second and third voltage signals. ### Claim 9 (depends on 8) The dual supply amplifier of claim 8, wherein the first transistor is implemented by a MOSFET with a drain be able to sustain a voltage drop more than twice of the first supply voltage. ### Claim 10 (depends on 1) The dual supply amplifier of claim 1, wherein the output stage comprises a second transistor coupled to the second supply voltage and receiving the second voltage signal at a control terminal thereof and a third transistor coupled to the third supply voltage and receiving the third voltage signal at a control terminal thereof for generating the output signal according to the second supply voltage, the third supply voltage, the second and third voltage signals. ### Claim 11 (depends on 10) The dual supply amplifier of claim 10, wherein each of the second and third transistors is implemented by a MOSFET with a drain be able to sustain a voltage drop more than twice of the first supply voltage. ### Claim 12 (depends on 10) The dual supply amplifier of claim 10, wherein the second transistor is implemented by a PMOS and the third transistor is implemented by an NMOS.