# US 7,612,597 B2 · Electronic circuit

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- Number: US 7,612,597 B2
- Document ID: US7612597B2
- Status: Granted
- Kind: B2
- Application number: 11/847,871
- Filed: 2007-08-30
- Published: 2008-03-06
- Granted: 2009-11-03
- Earliest claimed: 2006-09-04
- Assignees: Kabushiki Kaisha Toshiba
- Inventors: Shuuji Matsumoto
- Web page: https://patentgrep.com/patent/US7612597B2

## CPC

- H03K 3/0375: {provided with means for increasing reliability; for protection; for ensuring a predetermined initial state when the supply voltage has been applied; for storing the actual state when the supply voltage fails (digital storage cells each combining volatile and non-volatile storage properties G11C14/00)}
- G06F 1/10: Distribution of clock signals {, e.g. skew}
- H03K 5/135: by the use of time reference signals, e.g. clock signals
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An electronic circuit for performing clock gating on a clock signal supplied to a clock system using both edges, has a non-inverted/inverted signal selector which has an input connected to an input terminal, is fed with the clock signal through the input terminal, and outputs a first signal obtained by non-inverting or inverting the clock signal in response to a control signal; a signal latch which has an input connected to an output of the non-inverted/inverted signal selector, outputs the inputted first signal as a second signal through an output terminal, and latches a state of the second signal in response to an enable signal inputted through an enable terminal; and an input/output comparator which compares the clock signal and the second signal and outputs the control signal to the non-inverted/inverted signal selector such that the first signal agrees with the second signal.

## Claims

### Claim 1

An electronic circuit for performing clock gating on a clock signal supplied to a clock system using both edges, comprising:
a non-inverted/inverted signal selector which has an input connected to an input terminal, is fed with the clock signal through the input terminal, and outputs a first signal obtained by non-inverting or inverting the clock signal in response to a control signal;
a signal latch which has an input connected to an output of the non-inverted/inverted signal selector, outputs the inputted first signal as a second signal through an output terminal, and latches a state of the second signal in response to an enable signal inputted through an enable terminal; and
an input/output comparator which compares the clock signal and the second signal and outputs the control signal to the non-inverted/inverted signal selector such that the first signal agrees with the second signal,
wherein the non-inverted/inverted signal selector includes an inverter which has an input connected to the input terminal, and a multiplexer which has a first input connected to the input terminal and a second input connected to an output of the inverter, switches signals inputted to the first input and the second input in response to the control signal inputted to a selecting/input terminal, and outputs the first signal,
the signal latch includes a latch circuit which has a D input connected to an output of the multiplexer and a G input connected to the enable terminal, outputs the inputted first signal as the second signal through the output terminal, and latches the state of the second signal in response to the enable signal inputted through the enable terminal, and
the input/output comparator includes an exclusive-OR circuit which has one input connected to the input terminal, the other input connected to the output terminal, and an output connected to the selecting/input terminal of the multiplexer, and compares the clock signal and the second signal to output the control signal such that the first signal agrees with the second signal.

### Claim 2 (depends on 1)

The electronic circuit according to claim 1, wherein the input/output comparator has a processing speed lower than a circuit delay of the non-inverted/inverted signal selector and the signal latch.

### Claim 3 (depends on 2)

The electronic circuit according to claim 2, wherein when the signal latch is returned to a state in which the second signal is outputted in synchronization with an edge of the clock signal, the enable signal is changed after the first signal and the second signal agree with each other.

### Claim 4 (depends on 1)

The electronic circuit according to claim 1, wherein when the signal latch is returned to a state in which the second signal is outputted in synchronization with an edge of the clock signal, the enable signal is changed after the first signal and the second signal agree with each other.