# US 7,612,584 B2 · Simultaneous LVDS I/O signaling method and apparatus

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- Number: US 7,612,584 B2
- Document ID: US7612584B2
- Status: Granted
- Kind: B2
- Application number: 12/251,600
- Filed: 2008-10-15
- Published: 2009-02-05
- Granted: 2009-11-03
- Earliest claimed: 2005-11-04
- Assignees: Texas Instruments Incorporated
- Inventors: Lee D. Whetsel
- Web page: https://patentgrep.com/patent/US7612584B2

## CPC

- H03K 19/01759: {with a bidirectional operation}
- H04L 25/0272: {Arrangements for coupling to multiple lines, e.g. for differential transmission}
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input to the input circuit is also connected to the input of the driver. The input circuit may also receive an offset voltage. In response to its inputs, the input circuit in each device can use comparators, gates and a multiplexer to determine the logic state being transmitted over the pair of LVDS signal paths from the other device. This advantageously reduces the number of required interconnects between the first and second devices by one half.

## Claims

### Claim 1

An LVDS input circuit comprising;
A. an inverter having an input connected to a data input lead and an inverting output;
B. an LVDS receiver having a non-inverting input connected to a first LVDS signal path, an inverting input connected to a second LVDS signal path, and an output;
C. window comparator circuitry having a non-inverting input connected to the first LVDS signal path, an inverting input connected to the second LVDS signal path, and an output; and
D. a multiplexer having one input connected to the inverting output of the inverter, another input connected to the output of the LVDS receiver, a control input connected to the output of the window comparator, and an output.

### Claim 2 (depends on 1)

The LVDS input circuit of claim 1 including an LVDS driver having a non-inverting output connected to the first LVDS signal path, an inverting output connected to the second LVDS signal path, and an input connected to the data input lead.

### Claim 3 (depends on 1)

The LVDS input circuit of claim 1 including:
A. an LVDS driver having a non-inverting output connected to the first LVDS signal path, an inverting output connected to the second LVDS signal path, and an input connected to the data input lead;
B. a first resistor connected in series between the non-inverting output of the LVDS driver and the first LVDS signal path;
C. a second resistor connected in series between the inverting output of the LVDS driver and the second LVDS signal path; and
D. a third resistor connected between the first and second LVDS signal paths.

### Claim 4 (depends on 1)

The LVDS input circuit of claim 1 including a resistor connected between the first and second LVDS signal paths.