# US 7,612,396 B2 · Semiconductor device

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- Number: US 7,612,396 B2
- Document ID: US7612396B2
- Status: Granted
- Kind: B2
- Application number: 11/768,387
- Filed: 2007-06-26
- Published: 2007-10-25
- Granted: 2009-11-03
- Earliest claimed: 2004-12-21
- Assignees: Seiko Epson Corporation
- Inventors: Susumu Inoue; Yo Takeda; Yutaka Maruo
- Web page: https://patentgrep.com/patent/US7612396B2

## CPC

- H10F 77/334: {for shielding light, e.g. light blocking layers or cold shields for infrared detectors}
- H10B 41/30: characterised by the memory core region
- H10B 41/60: the control gate being a doped region, e.g. single-poly memory cell
- H10B 69/00: Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10B: ELECTRONIC MEMORY DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device includes a semiconductor element that is set up on a semiconductor layer, a light shielding wall that is set up around the semiconductor element, a hole that is set up on the light shielding wall, and a wiring layer that is electrically connected to the semiconductor element and is drawn out through the hole to the outside of the light shielding wall. The wiring layer has a pattern including a first part that is located within the hole and a second part that is located on the outside of the hole and has a larger width compared to the width of the first part, the width of the second part being the same with or larger than the width of the hole.

## Claims

### Claim 1

A semiconductor device, comprising:
a semiconductor element;
a light-shielding wall formed around the semiconductor element, the light-shielding wall having a first edge and a second edge opposed to the first edge;
a first wiring film formed between the first edge and the second edge, the first wiring extending along a first direction; and
a second wiring film connecting to the first wiring film, the second wiring film being formed outside the light-shielding wall, the second wiring film extending along a second direction that intersects the first direction, and
wherein the light-shielding wall includes a contact layer, a metal layer formed above the contact layer and a via layer formed above the metal layer.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1, wherein the light-shielding wall includes metal.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1, wherein the light-shielding wall covers the semiconductor element.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, wherein the semiconductor element includes a nonvolatile memory including a floating gate electrode.

### Claim 5 (depends on 4)

The semiconductor device according to claim 4, wherein the nonvolatile memory includes a single layer gate electrode.

### Claim 6 (depends on 4)

The semiconductor device according to claim 4, wherein the nonvolatile memory includes:
a first region including a floating gate electrode;
a second region including a first transistor; and
a third region including a second transistor,
a first gate electrode of the first transistor electrically connects to a second gate electrode of the second transistor, and
the first gate electrode electrically connects to the floating gate.

### Claim 7 (depends on 4)

The semiconductor device according to claim 4, wherein the nonvolatile memory is formed inside the light-shielding wall.

### Claim 8

A semiconductor device, comprising:
a semiconductor element;
a light-shielding wall formed around the semiconductor element, the light-shielding wall having a first edge and a second edge opposed to the first edge;
a first wiring film formed between the first edge and the second edge, the first wiring extending along a first direction; and
a second wiring film connecting to the first wiring film, the second wiring film being formed outside the light-shielding wall, the second wiring film extending along a second direction that intersects the first direction, and
wherein the light-shielding wall includes a contact layer, a first metal layer formed above the contact layer, a via layer formed above the first metal layer and a second metal layer formed above the via layer.

### Claim 9 (depends on 8)

The semiconductor device according to claim 8, wherein the light-shielding wall includes metal.

### Claim 10 (depends on 8)

The semiconductor device according to claim 8, wherein the light-shielding wall covers the semiconductor element.

### Claim 11 (depends on 8)

The semiconductor device according to claim 8, wherein the semiconductor element includes a nonvolatile memory including a floating gate electrode.

### Claim 12 (depends on 11)

The semiconductor device according to claim 11, wherein the nonvolatile memory includes a single layer gate electrode.

### Claim 13 (depends on 11)

The semiconductor device according to claim 11, wherein the nonvolatile memory includes:
a first region including a floating gate electrode;
a second region including a first transistor; and
a third region including a second transistor,
a first gate electrode of the first transistor electrically connects to a second gate electrode of the second transistor, and
the first gate electrode electrically connects to the floating gate.

### Claim 14 (depends on 11)

The semiconductor device according to claim 11, wherein the nonvolatile memory is formed inside light-shielding wall.