# US 7,612,379 B2 · Multi-gate thin film transistor having recrystallized channel regions with different grain sizes > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,612,379 B2 - Document ID: US7612379B2 - Status: Granted - Kind: B2 - Application number: 11/938,117 - Filed: 2007-11-09 - Published: 2008-06-05 - Granted: 2009-11-03 - Earliest claimed: 2006-11-30 - Assignees: TPO Displays Corp. - Inventors: Yoshihiro Morimoto; Ryan Lee; Hanson Liu; Fengyi Chen - Web page: https://patentgrep.com/patent/US7612379B2 ## CPC - H10D 30/6731: {Top-gate only TFTs} - H10D 30/6708: {for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect} - H10D 30/6733: {Multi-gate TFTs} - H10D 30/6745: {Polycrystalline or microcrystalline silicon} - H10D 86/425: {having different crystal properties in different TFTs or within an individual TFT} - H10D 86/60: wherein the TFTs are in active matrices - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract An image display system has a multi-gate thin film transistor (TFT) disposed on a transparent substrate. The multi-gate TFT includes a silicon film layer, a first electrode and a reflecting layer. The silicon film layer is formed on the transparent substrate and has a first crystallization zone and a second crystallization zone, which are not adjacent to each other. A grain size of the first crystallization zone is smaller than a grain size of the second crystallization zone. The first electrode corresponding to the first crystallization zone is disposed on the silicon film layer. The reflecting layer corresponding to the second crystallization zone is disposed on the transparent substrate. The silicon film layer is disposed on the transparent substrate and the reflecting layer. ## Claims ### Claim 1 An image display system having a multi-gate thin-film transistor (TFT) disposed on a transparent substrate, wherein the multi-gate TFT comprises: a silicon film layer, which is formed on the transparent substrate and has a first crystallization zone and a second crystallization zone that are not adjacent to each other, wherein a grain size of the first crystallization zone is smaller than a grain size of the second crystallization zone; a first electrode, which corresponds to the first crystallization zone and is disposed on the silicon film layer; and a reflecting layer, which corresponds to the second crystallization zone and is disposed on the transparent substrate, wherein the silicon film layer is disposed on the transparent substrate and the reflecting layer. ### Claim 2 (depends on 1) The system according to claim 1, wherein the grain size of the second crystallization zone is formed by absorbing a laser beam and a reflected laser beam. ### Claim 3 (depends on 1) The system according to claim 1, wherein the multi-gate TFT further comprises: a second electrode, which corresponds to the second crystallization zone and is disposed on the silicon film layer. ### Claim 4 (depends on 3) The system according to claim 3, wherein the first electrode serves as a gate of a first sub-TFT, and the second electrode serves as a gate of a second sub-TFT. ### Claim 5 (depends on 3) The system according to claim 3, wherein the first electrode serves as a gate of a first sub-TFT, and the second electrode and the reflecting layer serve as a gate of a second sub-TFT. ### Claim 6 (depends on 1) The system according to claim 1, wherein the first electrode serves as a gate of a first sub-TFT, and the reflecting layer serves as a gate of a second sub-TFT. ### Claim 7 (depends on 6) The system according to claim 6, wherein the first sub-TFT operates in an active region, and the second sub-TFT operates in a saturation region. ### Claim 8 (depends on 7) The system according to claim 7, wherein a width-to-length ratio of a channel region of the first sub-TFT is smaller than a width-to-length ratio of a channel region of the second sub-TFT. ### Claim 9 (depends on 1) The system according to claim 1, wherein the reflecting layer has a thickness greater than 100 angstroms. ### Claim 10 (depends on 1) The system according to claim 1, wherein a length of the first crystallization zone is longer than a length of the second crystallization zone. ### Claim 11 (depends on 1) The system according to claim 1, wherein the multi-gate TFT further comprises: a buffer layer disposed on the transparent substrate, wherein the silicon film layer is disposed on the buffer layer; and a gate insulating layer disposed on the silicon film layer, wherein the first electrode is disposed on the gate insulating layer. ### Claim 12 (depends on 1) The system according to claim 1, wherein the silicon film layer further comprises: a first doped region disposed near the first crystallization zone to serve as a source of the multi-gate TFT; a second doped region disposed between the first crystallization zone and the second crystallization zone; and a third doped region disposed near the second crystallization zone to serve as a drain of the multi-gate TFT. ### Claim 13 (depends on 1) The system according to claim 1, further comprising: an active matrix display panel having the transparent substrate and the multi-gate TFT. ### Claim 14 (depends on 13) The system according to claim 13, further comprising: an electronic device having the active matrix display panel and an input unit coupled with the active matrix display panel, wherein the input unit provides an input for the active matrix display panel to make the active matrix display panel display an image. ### Claim 15 (depends on 14) The system according to claim 14, wherein the electronic device is a mobile phone, a digital camera, a personal digital assistant, a notebook computer, a desktop computer, a television, a vehicle display or a portable DVD player.