# US 7,612,359 B2 · Microelectronic devices using sacrificial layers and structures fabricated by same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,612,359 B2
- Document ID: US7612359B2
- Status: Granted
- Kind: B2
- Application number: 11/860,674
- Filed: 2007-09-25
- Published: 2008-01-17
- Granted: 2009-11-03
- Earliest claimed: 2003-12-12
- Assignees: Samsung Electronics Co., Ltd.
- Inventors: Suk-Hun Choi; Yoon-Ho Son; Sung-Lae Cho; Joon-Sang Park
- Web page: https://patentgrep.com/patent/US7612359B2

## CPC

- H10N 70/231: {based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect}
- H10N 70/011: {Manufacture or treatment of multistable switching devices}
- H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices}
- H10N 70/8413: {adapted for resistive heating}
- H10B 63/30: {comprising selection components having three or more electrodes, e.g. transistors}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A dielectric layer is formed on a region of a microelectronic substrate. A sacrificial layer is formed on the dielectric layer, and portions of the sacrificial layer and the dielectric layer are removed to form an opening that exposes a portion of the region. A conductive layer is formed on the sacrificial layer and in the opening. Portions of the sacrificial layer and the conductive layer on the dielectric layer are removed to leave a conductive plug in the dielectric layer and in contact with the region. Removal of the sacrificial layer and portions of the conductive layer on the dielectric layer may include polishing to expose the sacrificial layer and to leave a conductive plug in the sacrificial layer and the dielectric layer, etching the sacrificial layer to expose the dielectric layer and leave a portion of the conductive plug protruding from the dielectric layer, and polishing to remove the protruding portion of the conductive plug. Phase-change memory devices formed by such techniques are also discussed.

## Claims

### Claim 1

A phase-change memory device, comprising:
a microelectronic substrate including a first conductive region;
a silicon nitride layer and/or a silicon oxynitride layer on the first conductive region;
a contact plug extending from a surface of the silicon nitride layer and/or a silicon oxynitride layer through an opening therein to the first conductive region;
a phase changeable material region on the contact plug and the silicon nitride layer and/or a silicon oxynitride layer; and
a second conductive region on the phase changeable material region.

### Claim 2 (depends on 1)

A device according to claim 1, further comprising a sidewall spacer in the opening in the silicon nitride layer and/or a silicon oxynitride layer.

### Claim 3 (depends on 2)

A device according to claim 2, wherein the sidewall spacer comprises silicon nitride.

### Claim 4 (depends on 1)

A device according to claim 1, wherein the contact plug comprises tungsten.

### Claim 5

A semiconductor memory device, comprising:
a microelectronic substrate including a first conductive region;
a silicon nitride layer and/or a silicon oxynitride layer on the first conductive region;
a contact plug extending from a surface of the silicon nitride layer and/or a silicon oxynitride layer through an opening therein to the first conductive region;
a phase changeable material region on the contact plug and the silicon nitride layer and/or a silicon oxynitride layer; and
a second conductive region on the phase changeable material region.

### Claim 6 (depends on 5)

A device according to claim 5, further comprising a sidewall spacer in the opening in the silicon nitride layer and/or a silicon oxynitride layer.

### Claim 7 (depends on 6)

A device according to claim 6, wherein the sidewall spacer comprises silicon nitride.

### Claim 8 (depends on 5)

A device according to claim 5, wherein the contact plug comprises a metal-containing material.

### Claim 9

A semiconductor memory device including a phase changeable material, comprising:
a semiconductor substrate;
an interlayer dielectric layer formed on the substrate;
a first conductive region formed in the interlayer dielectric layer;
a silicon nitride layer and/or a silicon oxynitride layer on the first conductive region and the interlayer dielectric layer;
a contact plug extending from a surface of the silicon nitride layer and/or silicon oxynitride layer through an opening therein to a portion of the first conductive region;
a phase changeable material region on the contact plug and the silicon nitride layer and/or silicon oxynitride layer; and
a second conductive region on the phase changeable material region.

### Claim 10 (depends on 9)

A device according to claim 9, further comprising a sidewall spacer in the opening in the silicon nitride layer and/or silicon oxynitride layer.

### Claim 11 (depends on 10)

A device according to claim 10, wherein the sidewall spacer comprises silicon nitride.

### Claim 12 (depends on 9)

A device according to claim 9, wherein the contact plug comprises a metal containing material.