# US 7,612,295 B2 · Printed wiring board and method for manufacturing the same

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- Number: US 7,612,295 B2
- Document ID: US7612295B2
- Status: Granted
- Kind: B2
- Application number: 11/420,421
- Filed: 2006-05-25
- Published: 2006-09-14
- Granted: 2009-11-03
- Earliest claimed: 1998-02-05
- Assignees: Ibiden Co., Ltd.
- Inventors: Masaru Takada; Hisashi Minoura; Kiyotaka Tsukada; Hiroyuki Kobayashi; Mitsuhiro Kondo
- Web page: https://patentgrep.com/patent/US7612295B2

## CPC

- H05K 1/113: {Via provided in pad; Pad over filled via}
- H05K 1/114: {Pad being close to via, but not surrounding the via}
- H05K 3/429: {Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers}
- H05K 3/4602: {characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated}
- H10W 70/685: comprising multiple insulating layers
- H10W 72/00: Interconnections or connectors in packages
- H05K 1/021: {Components thermally connected to metal substrates or heat-sinks by insert mounting}
- H05K 3/0035: {of blind holes, i.e. having a metal layer at the bottom}
- H05K 3/28: Applying non-metallic protective coatings {(H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673)}
- H05K 3/3465: Application of solder
- H05K 3/385: {by conversion of the surface of the metal, e.g. by oxidation, whether or not followed by reaction or removal of the converted layer}
- H05K 3/4652: {Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern (H05K3/4647 takes precedence)}
- H05K 3/4697: {having cavities, e.g. for mounting components (H05K3/4691 takes precedence)}
- H05K 2201/0355: Metal foils
- H05K 2201/0394: Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
- H05K 2201/09472: Recessed pad for surface mounting; Recessed electrode of component
- H05K 2201/09509: Blind vias, i.e. vias having one side closed
- H05K 2201/09527: Inverse blind vias, i.e. bottoms outwards in multilayer PCB; Blind vias in centre of PCB having opposed bottoms
- H05K 2201/09536: Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
- H05K 2201/0959: Plated through-holes or plated blind vias filled with insulating material
- H05K 2203/0315: Oxidising metal
- H05K 2203/0554: Metal used as mask for etching vias, e.g. by laser ablation
- H05K 2203/1581: Treating the backside of the PCB, e.g. for heating during soldering or providing a liquid coating on the backside
- H10W 70/682: {comprising holes having chips therein}
- H10W 72/07554: {changes in dispositions}
- H10W 72/547: {Dispositions of multiple bond wires}
- H10W 72/884: {Die-attach connectors and bond wires}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- Y10T 29/49126: Assembling bases
- Y10T 29/4913: Assembling to base an electrical component, e.g., capacitor, etc.
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon another. The first conductive layer (11) is constituted as a parts connecting layer and the n-th conductive layer (13) is constituted as an external connecting layer which is connected to external connecting terminals (7). The second to (n−1)-th conductive layers (12) are constituted as current transmitting layers for transmitting internal currents. The surface of the n-th conductive layer (13) is coated with the outermost n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to constitute the initial insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.

## Claims

### Claim 1

A printed wiring board comprising:
an insulating substrate having at least one interconnecting through hole penetrating the insulating substrate;
a patterned copper foil formed on the insulating substrate to cover a first opening of the interconnecting through hole;
a covering pad formed on the patterned copper foil;
a conductor circuit disposed along a peripheral edge of a second opening of the interconnecting through hole so as not to cover the second opening;
a metal plating film electrically connecting the covering pad and the conductor circuit, the metal plating film covering a wall of the interconnecting through hole;
a solder resist disposed over the insulating substrate, the solder resist covering the covering pad; and
a solder ball for external connection bonded on the conductor circuit.

### Claim 2 (depends on 1)

The printed wiring board according to claim 1, wherein the solder ball is located in alignment with the central axis of the interconnecting through hole.

### Claim 3 (depends on 1)

The printed wiring board according to claim 1, wherein the solder ball is located at a position offset from the interconnecting through hole.

### Claim 4 (depends on 1)

The printed wiring board according to claim 1, wherein the solder resist covers the surface of the insulating substrate and fills the interconnecting through hole.