# US 7,611,983 B2 · Semiconductor device and a manufacturing method of the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,611,983 B2 - Document ID: US7611983B2 - Status: Granted - Kind: B2 - Application number: 11/513,029 - Filed: 2006-08-31 - Published: 2007-09-27 - Granted: 2009-11-03 - Earliest claimed: 2006-03-23 - Assignees: Fujitsu Microelectronics Limited - Inventors: Akihito Nishimura - Web page: https://patentgrep.com/patent/US7611983B2 ## CPC - H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers} - H10P 14/418: {the conductive layers comprising transition metals} - H10W 20/033: {in openings in dielectrics} - H10W 20/069: {by forming self-aligned vias or self-aligned contact plugs} - H10W 20/089: {using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning} - H10W 20/097: {by thermally treating} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A first BPSG film covering a transistor is formed. Next, a second BPSG film is formed on the first BPSG film. The B concentration in the first BPSG film is about five times higher than the B concentration in the second BPSG film. Next, the first BPSG film is separated into a part of a source diffusion layer side and a part of a drain diffusion layer side, with a gate electrode being a boundary. Subsequently, a contact hole reaching the source diffusion layer is formed in the first and second BPSG films. Then, by removing the first BPSG film exposed to the contact hole by isotropic etching, a hollow portion is formed between the source diffusion layer and the second BPSG film. Then, a barrier metal film made of TiN or the like is formed in the hollow portion. ## Claims ### Claim 1 A semiconductor device comprising: a semiconductor substrate; an impurity diffusion layer formed on a surface of said semiconductor substrate; transistors in which said impurity diffusion layer is a source diffusion layer or a drain diffusion layer; an element isolation film above the semiconductor substrate; a first insulating film covering said transistors, wherein a hollow portion extending over said impurity diffusion layer and a contact hole extending upward from said hollow portion to a surface of said first insulating film are formed in said first insulating film; a conductive film formed in said hollow portion; a contact plug formed in said contact hole, and connecting electrically to said impurity diffusion layer, wherein said conductive film includes the same material as a material included said contact plug; and a second insulating film formed at one side of the hollow portion, wherein at least a portion of the second insulating film is provided above the element isolation film and under the first insulating film. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein said conductive film is a TiN film. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein said first insulating film is a BPSG film. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein a silicide layer does not exist on said source diffusion layer and on said drain diffusion layer. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein each of said transistors constitutes a memory cell of a flash memory. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein at least a portion of the conductive film is touch with the impurity diffusion layer. ### Claim 7 A manufacturing method of a semiconductor device, comprising: forming a transistor having a gate electrode, a first impurity diffusion layer and a second impurity diffusion layer on a surface of a semiconductor substrate; forming a first insulating film covering said transistor; forming a second insulating film on said first insulating film; separating said first insulating film into a part of said first impurity diffusion layer side and a part of said second impurity diffusion layer side, with said gate electrode being a boundary; forming a contact hole reaching said first impurity diffusion layer in said first and second insulating films; forming a hollow portion between said first impurity diffusion layer and said second insulating film by removing said first insulating film exposed to said contact hole; and forming a conductive film in said hollow portion. ### Claim 8 (depends on 7) The manufacturing method of a semiconductor device according to claim 7, wherein said transistor shares said first impurity diffusion layer with another transistor. ### Claim 9 (depends on 7) The manufacturing method of a semiconductor device according to claim 7, wherein said separating a first insulating film comprises reflowing said first insulating film by a heat treatment. ### Claim 10 (depends on 7) The manufacturing method of a semiconductor device according to claim 7, wherein a first BPSG film is formed as said first insulating film, and a second BPSG film whose B concentration is higher than that of said first BPSG film is formed as said second insulating film. ### Claim 11 (depends on 10) The manufacturing method of a semiconductor device according to claim 10, wherein said B concentration of said second BPSG film is five times or more than said B concentration of said first BPSG film. ### Claim 12 (depends on 7) The manufacturing method of a semiconductor device according to claim 7, wherein said forming the hollow portion comprises the performing isotropic etching of said first insulating film. ### Claim 13 (depends on 7) The manufacturing method of a semiconductor device according to claim 7, wherein said conductive film is formed by a CVD method. ### Claim 14 (depends on 7) The manufacturing method of a semiconductor device according to claim 7, wherein a TiN film is formed as said conductive film. ### Claim 15 (depends on 7) The manufacturing method of a semiconductor device according to claim 7, wherein said forming the conductive film comprised forming a barrier metal film on a side surface of said contact hole. ### Claim 16 (depends on 15) The manufacturing method of a semiconductor device according to claim 15, further comprising filling a conductive material into the contact hole after said forming the barrier metal film. ### Claim 17 A manufacturing method of a semiconductor device, comprising: forming a transistor having a gate electrode, a first impurity diffusion layer and a second impurity diffusion layer on a surface of a semiconductor substrate; forming a first insulating film which is apart from said second impurity diffusion layer on said first impurity diffusion layer; forming a second insulating film covering said transistor and said first insulating film; forming a contact hole reaching said first impurity diffusion layer in said first and second insulating films; forming a hollow portion between said first impurity diffusion layer and said second insulating film by removing said first insulating film exposed to said contact hole; and forming a conductive film in said hollow portion. ### Claim 18 (depends on 17) The manufacturing method of a semiconductor device according to claim 17, wherein said transistor shares said first impurity diffusion layer with another transistor. ### Claim 19 (depends on 17) The manufacturing method of a semiconductor device according to claim 17, wherein said forming the first insulating film comprises: forming the first insulating film on an entire surface; and separating said first insulating film into a part of said first impurity diffusion layer side and a part of said second impurity diffusion layer side, with said gate electrode being a boundary, by polishing said first insulating film until said gate electrode is exposed. ### Claim 20 (depends on 17) The manufacturing method of a semiconductor device according to claim 17, wherein said forming the hollow portion comprises performing isotropic etching of said first insulating film. ### Claim 21 (depends on 17) The manufacturing method of a semiconductor device according to claim 17, wherein said conductive film is formed by a CVD method.