# US 7,611,978 B2 · Method for forming gate electrode of semiconductor device

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,611,978 B2
- Document ID: US7611978B2
- Status: Granted
- Kind: B2
- Application number: 12/124,058
- Filed: 2008-05-20
- Published: 2008-11-27
- Granted: 2009-11-03
- Earliest claimed: 2007-05-21
- Assignees: Dongbu HiTek Co., Ltd.
- Inventors: Eun Sang Cho
- Web page: https://patentgrep.com/patent/US7611978B2

## CPC

- H10D 64/01326: {Aspects related to lithography, isolation or planarisation of the conductor}
- H10D 30/0225: {using an initial gate mask complementary to the prospective gate location, e.g. using dummy source and drain electrodes}
- H10P 50/71: {using masks for conductive or resistive materials}
- H10P 76/4085: {characterised by the processes involved to create the masks}
- H10D 64/018: {Spacers formed inside holes at the prospective gate locations, e.g. holes left by removing dummy gates}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Provided is a method for forming a gate electrode of a semiconductor device which can form a gate electrode having a fine line width. Disclosed method steps include forming a gate oxide film, a polysilicon film for a gate electrode, and a first sacrificial layer on the entire surface of a semiconductor substrate and then forming an opening within the first sacrificial layer. The effective width of the hole is reduced, and an ion implantation layer is formed on the top surface of the polysilicon film in the region exposed through the hole. A gate electrode is formed under the ion implantation layer by using the ion implantation layer as a mask.

## Claims

### Claim 1

A method for forming a gate electrode of a semiconductor device, comprising:
forming a gate oxide film, a gate electrode film, and a first sacrificial layer on the surface of a semiconductor substrate;
forming an opening within the first sacrificial layer;
reducing the effective width of the opening;
forming an ion implantation layer on the top surface of the gate electrode film in a region exposed through the opening having the reduced width;
removing the first sacrificial layer;
forming a gate electrode under the ion implantation layer; and
removing the ion implantation layer.

### Claim 2 (depends on 1)

The method of claim 1, further comprising performing an annealing thermal treatment for lattice recovery in the ion implantation layer.

### Claim 3 (depends on 1)

The method of claim 1, wherein the effective width of the opening is reduced by depositing a spacer on a sidewall within the opening.

### Claim 4 (depends on 3)

The method of claim 3, wherein the spacer is formed within the opening by depositing a second sacrificial layer on the first sacrificial layer.

### Claim 5 (depends on 4)

The method of claim 4, wherein the first sacrificial layer and the second sacrificial layer are formed of the same material.

### Claim 6 (depends on 4)

The method of claim 4, wherein the first sacrificial layer and the second sacrificial layer are comprised of nitride films.

### Claim 7 (depends on 4)

The method of claim 4, wherein the region of the gate electrode film is exposed through the opening by performing an etching process so as to remove the second sacrificial layer formed substantially at the bottom of the opening.

### Claim 8 (depends on 1)

The method of claim 1, wherein the ion implantation is performed by ion-implanting either oxygen (O2) or nitrogen (N) atoms.

### Claim 9 (depends on 1)

The method of claim 1, wherein an atom donating layer is formed between the gate electrode film and the first sacrificial layer to provide atoms to be ion-implanted in ion implantation.

### Claim 10 (depends on 9)

The method of claim 9, wherein the atom donating layer is either an oxide film or a nitride film.

### Claim 11 (depends on 1)

The method of claim 1, wherein the opening is formed by an etching process using a photoresist pattern.

### Claim 12 (depends on 11)

The method of claim 11, further comprising the step of providing an anti reflective coating under the photoresist pattern.

### Claim 13 (depends on 1)

The method of claim 1, wherein the gate electrode is formed under the ion implantation layer by performing an etching process using the ion implantation layer as a mask.

### Claim 14 (depends on 1)

The method of claim 1, wherein the gate electrode film comprises polysilicon.

### Claim 15

A method for forming a gate electrode of a semiconductor device, comprising:
forming a gate oxide film, a polysilicon film, and a first sacrificial layer on the surface of a semiconductor substrate;
forming a substantially vertical opening within the first sacrificial layer;
forming a spacer on a sidewall defined by the opening;
forming an ion implantation layer on the top surface of the polysilicon film in a region exposed through the opening, the exposed region having been narrowed by the spacer;
removing the first sacrificial layer;
forming a gate electrode under the ion implantation layer by using the ion implantation layer as a mask; and
removing the ion implantation layer.