# US 7,611,041 B2 · Semiconductor device, manufacturing method and apparatus for the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,611,041 B2 - Document ID: US7611041B2 - Status: Granted - Kind: B2 - Application number: 11/847,687 - Filed: 2007-08-30 - Published: 2007-12-27 - Granted: 2009-11-03 - Earliest claimed: 2001-01-15 - Assignees: NEC Corporation - Inventors: Masamoto Tago; Tomohiro Nishiyama; Tetuya Tao; Kaoru Mikagi - Web page: https://patentgrep.com/patent/US7611041B2 ## CPC - B23K 3/0623: {for shaped solder piece feeding, e.g. preforms, bumps, balls, pellets, droplets} - H10W 72/0112: {Apparatus for manufacturing bump connectors} - B23K 2101/40: Semiconductor devices - H10W 72/012: {of bump connectors, dummy bumps or thermal bumps} - H10W 72/01225: {in solid form, e.g. by using a powder or by stud bumping} - H10W 72/01257: {by reflowing} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/29: Bond pads specially adapted therefor - H10W 72/923: {Bond pads having multiple stacked layers} - H10W 72/9415: {relative to the surface, e.g. recessed, protruding} - H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - B23K: SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting. ## Claims ### Claim 1 A method for manufacturing a semiconductor device, comprising the steps of: forming, on a wiring layer, an under-bump layer including first metal which is to form a first intermetallic compound at an interface through reaction with alloy solder; supplying alloy solder having second metal different from main component metal added thereto; and forming an alloy layer at an interface between the under-bump layer and the alloy solder by temporary fusing the alloy solder before cooling, wherein the alloy layer is a combination of the first intermetallic compound and a second intermetallic compound of the main component metal of the alloy solder and the second metal. ### Claim 2 (depends on 1) The semiconductor device manufacturing method according to claim 1, further comprising the step of, before forming the under-bump layer on the wiring layer, forming a contact layer for maintaining adhesion of the wiring layer and the under-bump layer. ### Claim 3 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein, when forming the solder bump, fusing of the alloy solder and deposition of the intermetallic compound are carried out by setting a temperature of an interface of the solder bump with the under-bump layer to lower than a temperature at the top of the solder bump on a specified temperature gradient. ### Claim 4 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein, when forming the solder bump, fusing of the alloy solder and deposition of the intermetallic compound are carried out by mounting the semiconductor device on a stage and causing a heating plate and a cooling plate movably provided at a lower part of the stage to be sequentially brought into contact with the stage. ### Claim 5 (depends on 4) The semiconductor device manufacturing method according to claim 4, wherein, at the time of heating using the heating plate, the semiconductor device is also heated from above by a non-contact heater provided at an upper part of the semiconductor device, and at the time of cooling using the cooling plate, while continuing heating using the non-contact heater, a temperature gradient between the top of solder bump and the interface of the solder bump with the under-bump layer is increased to promote deposition to the interface of the intermetallic compound with the under-bump layer. ### Claim 6 (depends on 4) The semiconductor device manufacturing method according to claim 4, wherein cooling using the cooling plate is carried out at cooling rate of at least 2° C. per second. ### Claim 7 (depends on 4) The semiconductor device manufacturing method according to claim 4, wherein the heating using the heating plate and the cooling using the cooling plate are carried out under a vacuum atmosphere of a specified gas. ### Claim 8 (depends on 7) The semiconductor device manufacturing method according to claim 7, wherein the specified gas includes one of an inert gas and a reductive gas. ### Claim 9 (depends on 8) The semiconductor device manufacturing method according to claim 8, wherein the inert gas comprises one of nitrogen and argon, and the reductive gas comprises one of hydrogen and a mixed gas including hydrogen. ### Claim 10 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the under-bump layer is formed from one of a single film and a laminate of a plurality of films made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by sputtering. ### Claim 11 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the under-bump layer is formed from one of a single film and a laminate of a plurality of films made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by one of nonelectrolytic plating and electrolytic plating. ### Claim 12 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the under-bump layer is formed as a laminate film of a film made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by the spattering and a film made of one selected from a group consisting of nickel, nickel alloy, copper and copper alloy which are formed by one of nonelectrolytic plating and electrolytic plating. ### Claim 13 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the alloy solder is supplied as one of a ball and pellet formed to a specified amount. ### Claim 14 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the alloy solder is supplied as solder paste. ### Claim 15 (depends on 1) The semiconductor device manufacturing method according to claim 1, wherein the main component of the alloy solder is tin. ### Claim 16 (depends on 15) The semiconductor device manufacturing method according to claim 15, wherein a second main component of the alloy solder after tin is silver. ### Claim 17 (depends on 15) The semiconductor device manufacturing method according to claim 15, wherein copper is added to the alloy solder.