# US 7,610,536 B2 · Select and enable leads connecting IC taps and embedded controller

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- Number: US 7,610,536 B2
- Document ID: US7610536B2
- Status: Granted
- Kind: B2
- Application number: 11/936,884
- Filed: 2007-11-08
- Published: 2008-03-06
- Granted: 2009-10-27
- Earliest claimed: 1996-08-30
- Assignees: Texas Instruments Incorporated
- Inventors: Lee D. Whetsel
- Web page: https://patentgrep.com/patent/US7610536B2

## CPC

- G01R 31/3177: Testing of logic operation, e.g. by logic analysers
- G01R 31/318536: {Scan chain arrangements, e.g. connections, test bus, analog signals}
- G01R 31/318555: {Control logic}
- G01R 31/318558: {Addressing or selecting of subparts of the device under test}
- G01R 31/318563: {Multiple simultaneous testing of subparts}
- G01R 31/318572: {Input/Output interfaces}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)

## Abstract

A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).

## Claims

### Claim 1

An integrated circuit comprising:
A. plural TAPs, each having a TDI, TDO, TMS, select output, and enable input lead;
B. TDI, TDO, TMS, and TCK terminals coupled with the respective TDI, TDO, TMS, and TCK leads; and
C. an embedded controller having TDI, TDO, TMS, and TCK leads coupled with the respective TDI, TDO, TMS, and TCK terminals, and having a separate select input lead and a separate enable output lead connected respectively to the select output lead and enable input lead of each TAP, and the embedded controller being responsive to a communication on the TDI, TMS, and TCK terminals to enable a TAP for access via the TDI, TDO, TMS, and TCK terminals.

### Claim 2 (depends on 1)

The integrated circuit of claim 1 in which the TDI, TMS, and TCK leads of the TAPs and the embedded controller are connected to the respective TDI, TMS, and TCK terminals.

### Claim 3 (depends on 1)

The integrated circuit of claim 1 in which the TDO leads of the TAPs and the embedded controller are selectively coupled to the TDO terminal through multiplexers.

### Claim 4 (depends on 1)

The integrated circuit of claim 1 in which each TAP includes:
A. TAP controller circuitry connected to the TMS and TCK terminals and having control outputs;
B. instruction register circuitry and data register circuitry having TDI inputs connected with the TDI terminal, control inputs connected with the control inputs of the TAP controller circuitry, and TDO outputs; and
C. multiplexer circuitry having TDO inputs connected with the TDO outputs of the instruction register circuitry and data register circuitry, a control input connected with the control outputs of the TAP controller circuitry, and a TDO output connected with the TDO terminal.

### Claim 5 (depends on 1)

The integrated circuit of claim 1 in which a TAP includes:
A. TAP controller circuitry connected to the TMS and TCK terminals and having control outputs;
B. instruction register circuitry and boundary scan register circuitry having TDI inputs connected with the TDI terminal, control inputs connected with the control inputs of the TAP controller circuitry, and TDO outputs;
C. multiplexer circuitry having TDO inputs connected with the TDO outputs of the instruction register circuitry and boundary scan register circuitry, a control input connected with the control outputs of the TAP controller circuitry, and a TDO output connected with the TDO terminal.

### Claim 6 (depends on 1)

The integrated circuit of claim 1 including boundary scan register circuitry, functional circuitry, and megamodule circuitry, a first TAP being connected to the boundary scan register circuitry and the functional circuitry, and a second TAP being connected with the first megamodule circuitry and being free of connections with the boundary scan register circuitry and the functional circuitry.