# US 7,610,480 B2 · System and method for controlling boot-up process in a communications network switch > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,610,480 B2 - Document ID: US7610480B2 - Status: Granted - Kind: B2 - Application number: 11/388,612 - Filed: 2006-03-24 - Published: 2006-10-05 - Granted: 2009-10-27 - Earliest claimed: 2005-04-01 - Assignees: Alcatel Lucent - Inventors: Prakash Jain; Trinh N. Minh - Web page: https://patentgrep.com/patent/US7610480B2 ## CPC - H04L 41/0806: for initial configuration or provisioning, e.g. plug-and-play - H04L 12/46: Interconnection of networks - H04L 67/34: {involving the movement of software or configuration parameters (network booting or remote initial program loading [RIPL] G06F9/4416)} - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A system and method for controlling an Ethernet node's boot-up process. Upon detecting a system reset condition with respect to the Ethernet node, a link down condition is effectuated on at least a portion of the link ports of the Ethernet node. Initialization and configuration of system switch software continues to take place in response to the system reset condition. Responsive to the link down condition, network traffic on the link ports is discontinued. Upon completion of the system software configuration, a link up condition is effectuated on the link ports, whereupon network traffic on the link ports may recommence. ## Claims ### Claim 1 A method of controlling an Ethernet node's boot-up process, comprising: upon detecting a system reset condition with respect to said Ethernet node, effectuating a link down condition on at least a portion of link ports of said Ethernet node, whereupon network traffic at said link ports is discontinued; completing configuration of system software associated with said Ethernet node, said configuration taking place responsive to said system reset condition; and upon completion of said configuration, effectuating a link up condition on said link ports of said Ethernet node; wherein said link down condition is effectuated by maintaining an appropriate logic level on a TX DISABLE pin associated with a physical layer (PHY) device that is responsible for interfacing with said at least a portion of said link ports. ### Claim 2 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said link down condition is effectuated without delay in response to said system reset condition. ### Claim 3 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said link ports comprise a plurality of Gigabit Ethernet ports. ### Claim 4 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said link ports comprise a plurality of 1000BASE-X Small Form-factor Pluggable (SFP) ports. ### Claim 5 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said link ports comprise a plurality of Registered Jack-45 (RJ-45) ports operable with at least one of 10BASE-T, 100BASE-T, or 1000BASE-T Ethernet standards. ### Claim 6 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein network traffic at said link ports is discontinued upon effectuating said link down condition. ### Claim 7 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein network traffic at said link ports is resumed upon effectuating said link up condition. ### Claim 8 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said logic level comprises a logic high for assertion. ### Claim 9 (depends on 1) The method of controlling an Ethernet node's boot-up process as recited in claim 1, wherein said link up condition is effectuated by inverting said logic level on said TX DISABLE pin upon receiving an indication that said configuration of said system software has been completed. ### Claim 10 A system for controlling an Ethernet node's boot-up process, comprising: means for effectuating a link down condition on at least a portion of link ports of said Ethernet node, said means operating responsive to detecting a system reset condition with respect to said Ethernet node; and means for effectuating a link up condition on said link ports of said Ethernet node in response to receiving an indication that configuration of system software associated with said Ethernet node has been completed, said configuration taking place responsive to said system reset condition; wherein said link down condition is effectuated by maintaining an appropriate logic level on a TX DISABLE pin associated with a physical layer (PHY) device that is responsible for interfacing with said at least a portion of said link ports. ### Claim 11 (depends on 10) The system for controlling an Ethernet node's boot-up process as recited in claim 10, wherein said link down condition is effectuated without delay in response to detecting said system reset condition. ### Claim 12 (depends on 10) The system for controlling an Ethernet node's boot-up process as recited in claim 10, wherein said link ports comprise a plurality of Gigabit Ethernet ports. ### Claim 13 (depends on 10) The system for controlling an Ethernet node's boot-up process as recited in claim 10, wherein said link ports comprise a plurality of 1000BASE-X Small Form-factor Pluggable (SFP) ports. ### Claim 14 (depends on 10) The system for controlling an Ethernet node's boot-up process as recited in claim 10, wherein said link ports comprise a plurality of Registered Jack-45 (RJ-45) ports operable with at least one of 10 BASE-T, 100BASE-T, or 1000BASE-T Ethernet standards. ### Claim 15 (depends on 10) The system for controlling an Ethernet node's boot-up process as recited in claim 10, wherein said logic level comprises a logic high for assertion. ### Claim 16 (depends on 10) The system for controlling an Ethernet node's boot-up process as recited in claim 10, wherein said link up condition is effectuated by inverting said logic level on said TX DISABLE pin upon receiving said indication that said configuration of said system software has been completed. ### Claim 17 A network node operable in an Ethernet environment, comprising: a plurality of link ports, wherein at least one link port is operable for coupling with a remote device via an Ethernet link; a first structure for driving a first logic level on said at least one link port responsive to detecting a system reset condition with respect to said network node, whereupon said remote device is operable to discontinue network traffic on said Ethernet link; and a second structure for driving a second logic level on said at least one link port responsive to receiving an indication that configuration of system software associated with said network node has been completed, said configuration having taken place responsive to said system reset condition, whereupon said remote device is operable to resume network traffic on said Ethernet link; wherein said first logic level is driven by said first structure on a TX DISABLE pin associated with a physical layer (PHY) device that is responsible for interfacing with said at least one link port. ### Claim 18 (depends on 17) The network node operable in an Ethernet environment as recited in claim 17, wherein said link ports comprise a plurality of Gigabit Ethernet ports. ### Claim 19 (depends on 17) The network node operable in an Ethernet environment as recited in claim 17, wherein said link ports comprise a plurality of 1000BASE-X Small Form-factor Pluggable (SFP) ports. ### Claim 20 (depends on 17) The network node operable in an Ethernet environment as recited in claim 17, wherein said link ports comprise a plurality of Registered Jack-45 (RJ-45) ports operable with at least one of 10BASE-T, 100BASE-T, or 1000BASE-T Ethernet standards. ### Claim 21 (depends on 17) The network node operable in an Ethernet environment as recited in claim 17, wherein said first and second structures are implemented in said physical layer (PHY) device that is responsible for interfacing with said at least one link port. ### Claim 22 (depends on 17) The network node operable in an Ethernet environment as recited in claim 17, wherein said first logic level comprises a logic high. ### Claim 23 (depends on 22) The network node operable in an Ethernet environment as recited in claim 22, wherein said second logic level comprises a logic low.