# US 7,610,457 B2 · Interleaving method and system

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- Number: US 7,610,457 B2
- Document ID: US7610457B2
- Status: Granted
- Kind: B2
- Application number: 11/485,449
- Filed: 2006-07-13
- Published: 2007-01-25
- Granted: 2009-10-27
- Earliest claimed: 2005-07-19
- Assignees: Samsung Electronics Co., Ltd.
- Inventors: Jeong-sang Lee
- Web page: https://patentgrep.com/patent/US7610457B2

## CPC

- H03M 13/276: {Interleaving address generation}
- H03M 13/2703: {the interleaver involving at least two directions}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

An interleaving method employing symbol interleaving, tone interleaving, and cyclic interleaving for transmitting data includes storing data at write address values in a memory which are sequentially calculated according to a predetermined process, and reading data stored at read address values of the memory which are sequentially calculated according to a predetermined process, wherein the memory has N data banks, each data bank has M storage spaces, and there are D interleaving target data having data numbers A, and the storing data operation includes storing the data at storage spaces of the data banks, the storage spaces corresponding to integer values and the data banks corresponding to remainders obtained by dividing the data numbers A by results of dividing a total number of data D by the number of storage spaces M.

## Claims

### Claim 1

An interleaving method for transmitting data, the method comprising:
storing data at write address values in a memory which are sequentially determined according to a predetermined write address value calculation process; and
reading data stored at read address values of the memory which are sequentially determined according to a predetermined read address value calculation process,
wherein the memory has N data banks, each data bank has M storage spaces, there are D total interleaving target data with data numbers A,
N, M and D are integers not less than one, and A is an integer not less than zero, and
the storing data comprises storing the data at storage spaces of data banks, determining the storage spaces corresponding to integer values obtained by dividing the data numbers A by a result of dividing the total number of data D by the number of storage spaces M, and determining the data banks corresponding to remainders obtained by dividing the data numbers A by the result of dividing the total number of data D by the number of storage spaces M, and
the reading data comprises determining integer values L corresponding to remainders obtained by dividing a sum of readout numbers B and a cyclic interleaving value Q by the number of storage spaces M according to readout order by data bank, determining integer values C and remainders S by dividing the integer values E by a tone interleaving value L, determining the read address values by multiplying the remainders S by the result of the number of storage spaces M divided by the tone interleaving value L, and adding the integer values C and reading data corresponding to the read address values, M being an integer not less than one, E being integers not less than zero and not more than M, B and Q being integers not less than zero, L being an integer not less than two, S being an integer not less than zero and not more than L, and C being an integer not less than zero.

### Claim 2 (depends on 1)

The interleaving method as claimed in claim 1, wherein the data banks have bank address values 0, 1, 2, . . . , N−1.

### Claim 3 (depends on 1)

The interleaving method as claimed in claim 1, wherein the data bank storage spaces have space address values 0, 1, 2, . . . , M−1.

### Claim 4 (depends on 1)

The interleaving method as claimed in claim 1, wherein the interleaving target data numbers A are 0, 1, 2, . . . , D−1.

### Claim 5 (depends on 1)

The interleaving method as claimed in claim 1, wherein the readout numbers B are 0, 1, 2. . . , M−1.

### Claim 6 (depends on 1)

The interleaving method as claimed in claim 1, wherein the reading data is sequentially carried out according to the bank address values.

### Claim 7 (depends on 1)

The interleaving method as claimed in claim 1, wherein the number of data banks N is 3, and the number of storage spaces M is 100.

### Claim 8 (depends on 1)

The interleaving method as claimed in claim 1, wherein the tone interleaving value L is 10.

### Claim 9 (depends on 1)

The interleaving method as claimed in claim 1, wherein the value Q is 0 if a bank address value is 0, 33 if the bank address value is 1, and 66 if the bank address value is 2.

### Claim 10

An interleaving system for transmitting data, the system comprising:
a write address value calculation unit which sequentially calculates write address values in a memory for sequentially storing data according to a predetermined write address value calculation process; and
a read write address value calculation unit which sequentially calculates read address values of the memory for sequentially reading data according to a predetermined read address value calculation process,
wherein the memory has N data banks, each data bank has M storage spaces, there are D interleaving target data having data numbers A,
N, M and D are integers not less than one, and A is an integer not less than zero,
the storing data includes storing the data at storage spaces of data banks, the storage spaces corresponding to integer values obtained by dividing the data numbers A by a result of dividing the total number of data D by the number of storage spaces M, and obtaining the data banks corresponding to remainders obtained by dividing the data numbers A by the result of dividing the total number of data D by the number of storage spaces M, and
the reading data comprises determining integer values E corresponding to remainders obtained by dividing a sum of readout numbers B and a cyclic interleaving value Q by the number of storage spaces M according to readout order by data bank, determining integer values C and remainders S by dividing the integer values E by a tone interleaving value L, determining the read address values by multiplying the remainders S by the result of the number of storage spaces M divided by the tone interleaving value L, and adding the integer values C and reading data corresponding to the read address values, M being an integer not less than one, L being integers not less than zero and not more than M, B and Q being integers not less than zero, L being an integer not less than two, S being an integer not less than zero and not more than L, and C being an integer not less than zero.

### Claim 11 (depends on 10)

The interleaving system as claimed in claim 10, wherein the data banks have bank address values 0, 1, 2, . . . , N−1.

### Claim 12 (depends on 10)

The interleaving system as claimed in claim 10, wherein the data bank storage spaces have space address values 0, 1, 2, . . . , M−1.

### Claim 13 (depends on 10)

The interleaving system as claimed in claim 10, wherein the interleaving target data numbers A are 0, 1, 2, . . . , D−1.

### Claim 14 (depends on 10)

The interleaving system as claimed in claim 10, wherein the read address value calculation unit sequentially calculates space address values according to the bank address values.

### Claim 15 (depends on 10)

The interleaving system as claimed in claim 10, wherein the number of data banks N is 3, and the number of storage spaces M is 100.

### Claim 16 (depends on 10)

The interleaving system as claimed in claim 10, wherein the tone interleaving value L is 10.

### Claim 17 (depends on 10)

The interleaving system as claimed in claim 10, wherein the value Q is 0 if a bank address value is 0, 33 if the bank address value is 1, and 66 if the bank address value is 2.

### Claim 18 (depends on 10)

The interleaving system as claimed in claim 10, further comprising:
a demultiplexer which inputs the write address values from the write address value calculation unit and stores the data according to the write address values.

### Claim 19 (depends on 10)

The interleaving system as claimed in claim 10, further comprising:
a multiplexer which inputs the read address values from the read address value calculation unit and reads the data according to the read address values.

### Claim 20 (depends on 10)

The interleaving method as claimed in claim 10, wherein the readout numbers B are 0, 1, 2, . . . , M−1.

### Claim 21

A deinterleaving method corresponding to a reverse process of an interleaving method for transmitting data stored in data banks, the deinterleaving method comprising:
recognizing readout numbers B in order of reading and receiving data;
calculating integer values E corresponding to remainders obtained by dividing sums of the readout numbers B and a cyclic interleaving value Q for each data bank by a number of storage spaces M;
calculating integer values C and remainders S by dividing the integer values E by a tone interleaving value L;
calculating space address values by multiplying the remainders S by a result of the number of storage spaces M divided by the tone interleaving value L, and adding the integer values C; and
storing received data at storage spaces corresponding to the calculated space address values, M being an integer not less than one, E being integers not less than zero and not more than M, B and Q being integers not less than zero, L being an integer not less than two, S being an integer not less than zero and not more than L, and C being an integer not less than zero.

### Claim 22

An interleaving method employing at least one interleaving in transmitting data, the interleaving method comprising:
storing data at write address values of a memory which are sequentially calculated according to a predetermined write address value calculation process; and
reading data stored at read address values of the memory which are sequentially calculated according to a predetermined read address value calculation process, wherein the memory has N data banks, each data bank has M storage spaces, there are D interleaving target data having data numbers A,
wherein N, M and D are integers not less than one, and A is an integer not less than zero,
the storing data includes storing the data at storage spaces of data banks, the storage spaces corresponding to integer values obtained by dividing the data numbers A by a result of dividing the total number of data D by the number of storage spaces M and obtaining the data banks corresponding to remainders obtained by dividing the data numbers A by the result of dividing the total number of data D by the number of storage spaces M, and
the reading data comprises determining integer values E corresponding to remainders obtained by dividing a sum of readout numbers B and a cyclic interleaving value Q by the number of storage spaces M according to readout order by data bank, determining integer values C and remainders S by dividing the integer values E by a tone interleaving value L, determining the read address values by multiplying the remainders S by the result of the number of storage spaces M divided by the tone interleaving value L, and adding the integer values C and reading data corresponding to the read address values, M being an integer not less than one, E being integers not less than zero and not more than M, B and Q being integers not less than zero, L being an integer not less than two, S being an integer not less than zero and not more than L, and C being an integer not less than zero.

### Claim 23 (depends on 22)

The interleaving method as claimed in claim 22, wherein the data banks have bank address values 0, 1, 2, . . . , N−1.

### Claim 24 (depends on 22)

The interleaving method as claimed in claim 22, wherein the data bank storage spaces have space address values 0, 1, 2, . . . , M−1.

### Claim 25 (depends on 22)

The interleaving method as claimed in claim 22, wherein the interleaving target data numbers A are 0, 1, 2, . . . , D−1.

### Claim 26 (depends on 22)

The interleaving method as claimed in claim 22, wherein the reading data is sequentially carried out according to the bank address values.

### Claim 27 (depends on 22)

The interleaving method as claimed in claim 22, wherein the readout numbers B are 0, 1, 2, . . . , M−1.

### Claim 28

An interleaving system employing at least one interleaving in transmitting data, the interleaving method comprising:
a write address value calculation unit for sequentially calculating write address values of a memory for sequentially storing data according to a predetermined write address value calculation process; and
a read write address value calculation unit for sequentially calculating read address values of the memory for sequentially reading data according to a predetermined read address value calculation process,
wherein the memory has N data banks, each data bank has M storage spaces, there are D interleaving target data having data numbers A, and the storing data includes storing the data at storage spaces of data banks,
N, M and D are integers not less than one, and A is an integer not less than zero,
the storage spaces corresponding to integer values obtained by dividing the data numbers A by a result of dividing the total number of data D by the number of storage spaces M, and obtaining the data banks corresponding to remainders obtained by dividing the data numbers A by a result of dividing the total number of data D by the number of storage spaces M, and
the read address value calculation unit calculates integer values E corresponding to remainders obtained by dividing addition values of readout numbers B and a cyclic interleaving value Q by the number of storage spaces M according to readout order by data bank, calculates integer values C and remainders S by dividing the integer values E by a tone interleaving value L, and calculating the read address values by multiplying the remainders S by the result of the number of storage spaces M divided by the tone interleaving value L, and adding the integer values C, M being an integer not less than one, E being integers not less than zero and not more than M, B and Q being integers not less than zero, L being an integer not less than two, S being an integer not less than zero and not more than L, and C being an integer not less than zero.

### Claim 29 (depends on 28)

The interleaving method as claimed in claim 28, wherein the data banks have bank address values 0, 1, 2, . . . , N−1.

### Claim 30 (depends on 28)

The interleaving method as claimed in claim 28, wherein the data bank storage spaces have space address values 0, 1, 2, . . . , M−1.

### Claim 31 (depends on 28)

The interleaving method as claimed in claim 28, wherein the interleaving target data numbers A are 0, 1, 2, . . . , D−1.

### Claim 32 (depends on 28)

The interleaving method as claimed in claim 28, wherein the readout numbers B are 0, 1, 2, . . . , M−1.

### Claim 33 (depends on 28)

The interleaving system as claimed in claim 28, wherein the read address value calculation unit sequentially calculates space address values according to the bank address values.

### Claim 34

A deinterleaving method corresponding to a reverse process of an interleaving method employing at least one interleaving in transmitting data stored in data banks, the deinterleaving method comprising:
recognizing readout numbers B in order of reading and receiving data;
calculating integer values E corresponding to remainders obtained by dividing sums of the readout numbers B and a cyclic interleaving value Q for each data bank by a number of storage spaces M;
calculating integer values C and remainders S by dividing the integer values E by a tone interleaving value L;
calculating space address values by multiplying the remainders S by a result of the number of storage spaces M divided by the tone interleaving value L, and adding the integer values C; and
storing received data at storage spaces corresponding to the calculated space address values, M being an integer not less than one, E being integers not less than zero and not more than M, B and Q being integers not less than zero, L being an integer not less than two, S being an integer not less than zero and not more than L, and C being an integer not less than zero.
