# US 7,609,718 B2 · Packet data service over hyper transport link(s) > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,609,718 B2 - Document ID: US7609718B2 - Status: Granted - Kind: B2 - Application number: 10/356,661 - Filed: 2003-01-31 - Published: 2004-02-26 - Granted: 2009-10-27 - Earliest claimed: 2002-05-15 - Assignees: Broadcom Corporation - Inventors: Manu Gulati; Laurent Moll; Barton Sano - Web page: https://patentgrep.com/patent/US7609718B2 ## CPC - H04L 12/56: {Packet switching systems} - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) ## Abstract A multiple processor device generates a control packet for at least one connectionless-based packet in partial accordance with a control packet format of the connection-based point-to-point link and partially not in accordance with the control packet format. For instance, the multiple processor device generates the control packet to include, in noncompliance with the control packet format, one or more of an indication that at least one connectionless-based packet is being transported, an indication of a virtual channel of a plurality of virtual channels associated with the at least one connectionless-based packet, an indication of an amount of data included in the associated data packet, status of the at least one connectionless-based packet, and an error status indication. The multiple processor device then generates the associated data packet in accordance with a data packet format of the connection-based point-to-point link, wherein the data packet includes at least a portion of the at least one connectionless-based packet. ## Claims ### Claim 1 A method for providing connectionless-based packets over a connection-based point-to-point link, the method comprises: generating, via at least one processing module, a control packet in partial accordance with a control packet format of the connection-based point-to-point link that includes a HyperTransport (HT) link, wherein the control packet includes, in noncompliance with the control packet format, an indication that at least one connectionless-based packet is being transported; and generating, via the at least one processing module, a data packet in accordance with a data packet format of the connection-based point-to-point link that includes a HyperTransport (HT) link, wherein the data packet includes at least a portion of the at least one connectionless-based packet, and wherein the data packet is associated with the control packet. ### Claim 2 (depends on 1) The method of claim 1, wherein the generating the control packet further comprises at least one of: providing an indication of a virtual channel of a plurality of virtual channels associated with the at least one connectionless-based packet; identifying a source of at least one of the control packet and the data packet; identifying a destination of at least one of the control packet and the data packet; providing an indication of an amount of data included in the data packet; providing status of the at least one connectionless-based packet; and providing an error status indication. ### Claim 3 (depends on 2) The method of claim 2, wherein the status of the at least one connectionless-based packet further comprises: a start of packet indication for the at least one connectionless-based packet; an end of packet indication for the at least one connectionless-based packet; a middle of packet indication for the at least one connectionless-based packet; and an indication of a number of valid bytes in a data packet associated with a control packet that includes the end of packet indication. ### Claim 4 (depends on 1) The method of claim 1, wherein the generating the control packet further comprises: generating a write command in partial accordance with a write command format of the HT link, wherein a portion of an address section of the write command format includes a unique address that indicates that the at least one connectionless-based packet is being transported, such that when a device of the connection-based point-to-point link is not packet over HT aware, the device that is not packet over HT aware forwards the control packet and the data packet in accordance with an HT link protocol and such that when a device in the connection-based point-to-point link is packet over HT aware, the device that is packet over HT aware processes the control packet and data packet. ### Claim 5 (depends on 4) The method of claim 4, wherein the generating the control packet further comprises: generating a sequence identification field within the control packet to indicate an identity of a virtual channel of a plurality of virtual channels associated with the at least one connectionless-based packet. ### Claim 6 (depends on 4) The method of claim 4, wherein the generating the control packet further comprises: generating a second portion of the address section to indicate status of the at least one connectionless-based packet. ### Claim 7 (depends on 6) The method of claim 6, wherein the status of the at least one connectionless-based packet further comprises: a start of packet indication for the at least one connectionless-based packet; an end of packet indication for the at least one connectionless-based packet; a middle of packet indication for the at least one connectionless-based packet; and an indication of a number of valid bytes in a data packet associated with a control packet that includes the end of packet indication. ### Claim 8 A method for processing connectionless-based packets over a connection-based point-to-point link, the connection-based point-to-point link including a HyperTransport (HT) link, the method comprises: receiving, via at least one processing module, a packet over the connection-based point-to-point link; determining, via the at least one processing module, whether the packet includes data corresponding to at least one connectionless-based packet, the determination based on a noncompliant indication that indicates whether the packet is not in accordance with a standard packet format of the packet for the connection-based point-to-point link; and when the packet includes the data corresponding to the at least one connectionless-based packet, processing, via the at least one processing module, the packet as a connectionless-based packet. ### Claim 9 (depends on 8) The method of claim 8, wherein the determining whether the packet includes data corresponding to the at least one connectionless-based packet further comprises: interpreting an address portion of the packet to determine whether the address portion contains a unique address that indicates that the at least one connectionless-based packet is being transported. ### Claim 10 (depends on 8) The method of claim 8, wherein the processing the packet further comprises: determining routing information of the received packet by using at least one of hashing function, random distribution operation, field examination, packet content comparison, and logic function. ### Claim 11 (depends on 10) The method of claim 10, wherein the determining the routing information further comprises: determining a many-to-many mapping of a plurality of input virtual channels to a plurality of output virtual channels based on at least one of an input virtual channel basis or an output virtual channel basis, wherein the input virtual channel basis utilized identity of at least one of the plurality of input virtual channels to identify at least one of the plurality of output virtual channels, and wherein the output virtual channel basis uses identity of an output virtual channel of the plurality of output virtual channels to route the packet to an appropriate output buffer. ### Claim 12 An apparatus for providing connectionless-based packets over a connection-based point-to-point link, the connection-based point-to-point link including a HyperTransport (HT) link, the apparatus comprises: processing module; and memory operably coupled to the processing module, wherein the memory includes operational instructions that, when executed, cause the processing module to: generate a control packet in partial accordance with a control packet format of the connection-based point-to-point link, wherein the control packet includes, in noncompliance with the control packet format, an indication that at least one connectionless-based packet is being transported; and generate a data packet in accordance with a data packet format of the connection-based point-to-point link that includes a HyperTransport (HT) link, wherein the data packet includes at least a portion of the at least one connectionless-based packet, and wherein the data packet is associated with the control packet. ### Claim 13 (depends on 12) The apparatus of claim 12, wherein the memory further comprises operational instructions that cause the processing module to generate the control packet by at least one of: providing an indication of a virtual channel of a plurality of virtual channels associated with the at least one connectionless-based packet; identifying a source of at least one of the control packet and the data packet; identifying a destination of at least one of the control packet and the data packet; providing an indication of an amount of data included in the data packet; providing status of the at least one connectionless-based packet; and providing an error status indication. ### Claim 14 (depends on 13) The apparatus of claim 13, wherein the status of the at least one connectionless-based packet further comprises: a start of packet indication for the at least one connectionless-based packet; an end of packet indication for the at least one connectionless-based packet; a middle of packet indication for the at least one connectionless-based packet; and an indication of a number of valid bytes in a data packet associated with a control packet that includes the end of packet indication. ### Claim 15 (depends on 12) The apparatus of claim 12, wherein the memory further comprises operational instructions that, when executed, cause the processing module to generate the control packet by: generating a write command in partial accordance with a write command format of the HT link, wherein a portion of an address section of the write command format includes a unique address that indicates that the at least one connectionless-based packet is being transported, such that when a device that is not packet over HT aware forwards the control packet and the data packet in accordance with an HT link protocol and such that when a device is packet over HT aware processes the control packet and data packet. ### Claim 16 (depends on 15) The apparatus of claim 15, wherein the memory further comprises operational instructions that cause the processing module to generate the control packet by: generating a sequence identification field within the control packet to indicate an identity of a virtual channel of a plurality of virtual channels associated with the at least one connectionless-based packet. ### Claim 17 (depends on 12) The apparatus of claim 12, wherein the memory further comprises operational instructions that cause the processing module to generate the control packet by: generating a second portion of the address section to indicate status of the at least one connectionless-based packet. ### Claim 18 (depends on 17) The apparatus of claim 17, wherein the status of the at least one connectionless-based packet further comprises: a start of packet indication for the at least one connectionless-based packet; an end of packet indication for the at least one connectionless-based packet; a middle of packet indication for the at least one connectionless-based packet; and an indication of a number of valid bytes in a data packet associated with a control packet that includes the end of packet indication. ### Claim 19 (depends on 12) The apparatus of claim 12, wherein the memory further comprises operational instructions that cause the processing module to: generate at least one flow control packet to release at least one buffer for at least one of a plurality of virtual channels. ### Claim 20 An apparatus for processing connectionless-based packets over a connection-based point-to-point link, the connection-based point-to-point link including a HyperTransport (HT) link, the apparatus comprises: processing module; and memory operably coupled to the processing module, wherein the memory includes operational instructions that cause the processing module to: receive a packet over the connection-based point-to-point link; determine whether the packet includes data corresponding to at least one connectionless-based packet, the determination based on a noncompliant indication that indicates whether the packet is not in accordance with a standard packet format of the packet for the connection-based point-to-point link; and when the packet includes the data corresponding to the at least one connectionless-based packet, process the packet as a connectionless-based packet. ### Claim 21 (depends on 20) The apparatus of claim 20, wherein the memory further comprises operational instructions that, when executed, cause the processing module to determine whether the packet includes data corresponding to the at least one connectionless-based packet by: interpreting an address portion of the packet to determine whether the address portion contains a unique address that indicates that the at least one connectionless-based packet is being transported. ### Claim 22 (depends on 20) The apparatus of claim 20, wherein the memory further comprises operational instructions that, when executed, cause the processing module to process the packet by: determining routing information by at least one of hashing function, random distribution operation, field examination, packet content comparison, and logic function. ### Claim 23 (depends on 22) The apparatus of claim 22, wherein the memory further comprises operational instructions that, when executed, cause the processing module to determine the routing information by: determining a many-to-many mapping of a plurality of input virtual channels to a plurality of output virtual channels based on at least one of an input virtual channel basis or an output virtual channel basis, wherein the input virtual channel basis utilized identity of at least one of the plurality of input virtual channels to identify at least one of the plurality of output virtual channels, and wherein the output virtual channel basis uses identity of an output virtual channel of the plurality of output virtual channels to route the packet to an appropriate output buffer. ### Claim 24 A multiple processor integrated circuit comprises: a plurality of processing units; cache memory; memory controller operably coupled to system memory; internal bus operably coupled to the plurality of processing units, the cache memory and the memory controller; packet manager operably coupled to the internal bus; node controller operably coupled to the internal bus; first configurable packet-based interface; second configurable packet-based interface; and switching module operably coupled to the packet manager, the node controller, the first configurable packet-based interface, and the second configurable packet-based interface, wherein each of the first and second configurable packet-based interfaces includes: processing module; and memory operably coupled to the processing module, wherein the memory includes operational instructions that, when executed, cause the processing module to: generate a control packet in partial accordance with a control packet format of a connection-based point-to-point link, wherein the control packet includes, in noncompliance with the control packet format, an indication that at least one connectionless-based packet is being transported; and generate a data packet in accordance with a data packet format of the connection-based point-to-point link that includes a HyperTransport (HT) link, wherein the data packet includes at least a portion of the at least one connectionless-based packet, and wherein the data packet is associated with the control packet. ### Claim 25 (depends on 24) The multiple processor integrated circuit of claim 24, wherein the memory further comprises operational instructions that, when executed, cause the processing module to generate the control packet by at least one of: providing an indication of a virtual channel of a plurality of virtual channels associated with the at least one connectionless-based packet; identifying a source of at least one of the control packet and the data packet; identifying a destination of at least one of the control packet and the data packet; providing an indication of an amount of data included in the data packet; providing status of the at least one connectionless-based packet; and providing an error status indication. ### Claim 26 (depends on 25) The multiple processor integrated circuit of claim 25, wherein the status of the at least one connectionless-based packet further comprises: a start of packet indication for the at least one connectionless-based packet; an end of packet indication for the at least one connectionless-based packet; a middle of packet indication for the at least one connectionless-based packet; and an indication of a number of valid bytes in a data packet associated with a control packet that includes the end of packet indication. ### Claim 27 (depends on 24) The multiple processor integrated circuit of claim 24, wherein the connection-based point-to-point link further comprises a HyperTransport (HT) link. ### Claim 28 (depends on 27) The multiple processor integrated circuit of claim 27, wherein the memory further comprises operational instructions that, when executed, cause the processing module to generate the control packet by: generating a write command in partial accordance with a write command format of the HT link, wherein a portion of an address section of the write command format includes a unique address that indicates that the at least one connectionless-based packet is being transported, such that when a device of the connection-based point-to-point link is not packet over HT aware forwards the control packet and the data packet in accordance with an HT link protocol and such that when a device of the connection-based point-to-point link is packet over HT aware processes the control packet and data packet. ### Claim 29 (depends on 28) The multiple processor integrated circuit of claim 28, wherein the memory further comprises operational instructions that, when executed, cause the processing module to generate the control packet by: generating a sequence identification field within the control packet to indicate an identity of a virtual channel of a plurality of virtual channels associated with the at least one connectionless-based packet. ### Claim 30 (depends on 28) The multiple processor integrated circuit of claim 28, wherein the memory further comprises operational instructions that, when executed, cause the processing module to generate the control packet by: generating a second portion of the address section to indicate status of the at least one connectionless-based packet. ### Claim 31 (depends on 30) The multiple processor integrated circuit of claim 30, wherein the status of the at least one connectionless-based packet further comprises: a start of packet indication for the at least one connectionless-based packet; an end of packet indication for the at least one connectionless-based packet; a middle of packet indication for the at least one connectionless-based packet; and an indication of a number of valid bytes in a data packet associated with a control packet that includes the end of packet indication. ### Claim 32 (depends on 24) The multiple processor integrated circuit of claim 24, wherein the memory further comprises operational instructions that, when executed, cause the processing module to determine whether the packet includes data corresponding to the at least one connectionless-based packet by: interpreting an address portion of the packet to determine whether the address portion contains a unique address that indicates that the at least one connectionless-based packet is being transported. ### Claim 33 (depends on 24) The multiple processor integrated circuit of claim 24, wherein the memory further comprises operational instructions that, when executed, cause the processing module to process the packet by: determining routing information by at least one of hashing function, random distribution operation, field examination, packet content comparison, and logic function. ### Claim 34 (depends on 33) The multiple processor integrated circuit of claim 33, wherein the memory further comprises operational instructions that, when executed, cause the processing module to determine the routing information by: determining a many-to-many mapping of a plurality of input virtual channels to a plurality of output virtual channels based on at least one of an input virtual channel basis or an output virtual channel basis, wherein the input virtual channel basis utilized identity of at least one of the plurality of input virtual channels to identify at least one of the plurality of output virtual channels, and wherein the output virtual channel basis uses identity of an output virtual channel of the plurality of output virtual channels to route the packet to an appropriate output buffer.