# US 7,609,562 B2 · Configurable device ID in non-volatile memory

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- Number: US 7,609,562 B2
- Document ID: US7609562B2
- Status: Granted
- Kind: B2
- Application number: 11/701,302
- Filed: 2007-01-31
- Published: 2008-07-31
- Granted: 2009-10-27
- Earliest claimed: 2007-01-31
- Assignees: Intel Corporation
- Inventors: Rajesh Sundaram
- Web page: https://patentgrep.com/patent/US7609562B2

## CPC

- G11C 5/04: Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports
- G11C 16/08: Address circuits; Decoders; Word-line control circuits
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

Various embodiments of the invention may use one or more programmable non-volatile registers in each memory device to provide a separate device address for that device. These registers may be programmed at various points in the manufacturing and distribution cycle, such as but not limited to the memory chip factory, an original equipment manufacturer (OEM), or in the field. In some embodiments, other types of information (e.g., configuration information for the memory device) may also be programmed in this manner.

## Claims

### Claim 1

A method, comprising:
issuing one or more signals to select a particular non-volatile memory device;
directing the selected memory device to program an address register within the selected memory device;
issuing an address to the selected memory device for the selected memory device to store in the address register; and
verifying the address was correctly stored in the selected memory device;
wherein the address stored in the memory device is to serve as a selection address for the memory device.

### Claim 2 (depends on 1)

The method of claim 1, wherein said issuing one or more signals comprises issuing a selection command.

### Claim 3 (depends on 1)

The method of claim 1, wherein said issuing one or more signals comprises asserting a programming signal.

### Claim 4 (depends on 1)

The method of claim 1, wherein said directing comprises issuing a command to the non-volatile memory device.

### Claim 5 (depends on 4)

The method of claim 4, wherein said command and said address are issued on a same set of input/output lines.

### Claim 6

An article comprising
a tangible machine-readable medium that contains instructions, which when executed by one or more processors result in performing operations comprising:
issuing one or more signals to select a particular non-volatile memory device;
directing the selected memory device to program an address register within the selected memory device;
issuing an address to the selected memory device for the selected memory device to store in the address register; and
verifying the address was correctly stored in the selected memory device;
wherein the address stored in the memory device is to serve as a selection address for the memory device;
wherein the operation of issuing one or more signals comprises asserting a programming signal.

### Claim 7 (depends on 6)

The article of claim 6, wherein the operation of issuing one or more signals comprises issuing a selection command.

### Claim 8 (depends on 6)

The article of claim 6, wherein the operation of directing comprises issuing a command to the non-volatile memory device.

### Claim 9 (depends on 6)

The article of claim 6, wherein said command and said address are issued on a same set of input/output lines.