Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsTomoaki Shino, Akihiro Nitayama, Takeshi Hamamoto, Hideaki Aochi, Takashi Ohsawa, Ryo Fukuda
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AssigneeKabushiki Kaisha Toshiba
InventorsTomoaki Shino, Akihiro Nitayama, Takeshi Hamamoto, Hideaki Aochi, Takashi Ohsawa, Ryo Fukuda
Estimating the term…
This disclosure concerns a memory comprising a charge trapping film; a gate insulating film; a back gate on the charge trapping film; a front gate on the gate insulating film; and a body region provided between a drain and a source, wherein the memory includes a first storage state for storing data depending on the number of majority carriers in the body region and a second storage state for storing data depending on the amount of charges in the charge trapping film, and the memory is shifted from the first storage state to the second storage state by converting the number of majority carriers in the body region into the amount of charges in the charge trapping film or from the second storage state to the first storage state by converting the amount of charges in the charge trapping film into the number of majority carriers in the body region.
A semiconductor memory device comprising:
A semiconductor memory device comprising:
Dependencies are inferred from the claim text.