# US 7,609,527 B2 · Electronic module > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,609,527 B2 - Document ID: US7609527B2 - Status: Granted - Kind: B2 - Application number: 11/907,795 - Filed: 2007-10-17 - Published: 2008-02-21 - Granted: 2009-10-27 - Earliest claimed: 2005-08-25 - Assignees: Imbera Electronics Oy - Inventors: Risto Tuominen; Petteri Palm - Web page: https://patentgrep.com/patent/US7609527B2 ## CPC - H05K 1/188: {manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component} - H05K 1/185: associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards - H05K 1/189: characterised by the use of flexible or folded printed circuits - H05K 3/4691: {Rigid-flexible multilayer circuits comprising rigid and flexible layers, e.g. having in the bending regions only flexible layers} - H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons - H10W 42/276: {the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation} - H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) - H10W 70/095: {of vias therein} - H10W 70/611: {for connecting multiple chips together} - H10W 70/614: {the multiple chips being integrally enclosed} - H10W 70/688: {Flexible insulating substrates} - H10W 74/01: Manufacture or treatment - H10W 74/114: {by a substrate and the encapsulations} - H10W 90/00: Package configurations - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H05K 1/0269: {for visual or optical inspection} - H05K 3/284: {for encapsulating mounted components (H05K1/185 takes precedence)} - H05K 3/4611: {by laminating two or more circuit boards (H05K3/4652 takes precedence)} - H05K 2201/0355: Metal foils - H05K 2201/0367: Metallic bump or raised conductor not used as solder bump - H05K 2201/042: Stacked spaced PCBs; Planar parts of folded flexible circuits having mounted components in between or spaced from each other - H05K 2201/056: Folded around rigid support or component - H05K 2201/09918: Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components - H05K 2201/10674: Flip chip - H05K 2203/063: of preperforated insulating layer - H05K 2203/166: Alignment or registration; Control of registration - H10W 46/00: Marks applied to devices, e.g. for alignment or identification - H10W 46/301: {for alignment} - H10W 70/09: extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs - H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/68: Shapes or dispositions thereof - H10W 70/682: {comprising holes having chips therein} - H10W 72/0198: {batch processes} - H10W 72/072: {of bump connectors} - H10W 72/07232: {Compression bonding, e.g. thermocompression bonding} - H10W 72/07233: {Ultrasonic bonding, e.g. thermosonic bonding} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/874: {On different surfaces} - H10W 72/9413: {on encapsulations} - H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu} - H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)} - H10W 74/473: {containing a filler} - H10W 80/334: {Thermocompression bonding} - H10W 80/335: {Ultrasonic bonding} - H10W 90/10: Configurations of laterally-adjacent chips - H10W 90/722: {between stacked chips} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/732: {between stacked chips} - H10W 90/794: {between a chip and a stacked insulating package substrate, interposer or RDL} - Y10T 29/49121: Beam lead frame or beam lead device - Y10T 29/4913: Assembling to base an electrical component, e.g., capacitor, etc. - Y10T 29/49131: by utilizing optical sighting device - Y10T 29/49144: by metal fusion - Y10T 29/49155: Manufacturing circuit on or in base - Y10T 29/49165: by forming conductive walled aperture in base - Y10T 29/49169: Assembling electrical component directly to terminal or elongated conductor - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION ## Abstract An electronic module in which an installation base is used, which includes an insulating-material layer (1) and a conductive layer on the surface of the insulating-material layer. The conductive layer also covers the installation cavity of a component (6). The component (6) is set in the installation cavity, in such a way that the contact zones face towards the conductive layer and electrical contacts are formed between the contact zones of the component (6) and the conductive layer. After this, conductive patterns (14) are formed from the conductive layer, to which the component (6) is attached. ## Claims ### Claim 1 An electronic module, comprising: a first conductive-pattern layer having a first surface, first solid contact bumps solderlessly made on the first surface of the first conductive-pattern layer and metallurgically and electrically connected thereto, a component having flat contact zones, second solid contact bumps solderlessly made on the flat contact zones and metallurgically and electrically connected thereto, and an insulating-material layer on the first surface of the first conductive-pattern layer, wherein the component is embedded in the insulating-material layer and wherein the second solid contact bumps made on the flat contact zones of the component are metallurgically, electrically and solderlessly connected to the first solid contact bumps made on the first surface of the first conductive-pattern layer. ### Claim 2 (depends on 1) The electronic module of claim 1, wherein the insulating-material layer comprises a first surface and a second surface, the first surface being against the first conductive-pattern layer, and the electronic module comprises a second conductive-pattern layer on the second surface of the insulating-material layer. ### Claim 3 (depends on 1) The electronic module of claim 1, wherein the first solid contact bumps include a layered structure, containing at least two layers of at least two different materials. ### Claim 4 (depends on 1) The electronic module of claim 1, wherein the component is a microcircuit. ### Claim 5 (depends on 1) The electronic module of claim 1, wherein the component is entirely protected inside the insulating-material layer. ### Claim 6 (depends on 1) The electronic module of claim 1, wherein the insulating-material layer comprises a first surface and a second surface, the first surface being against the first conductive-pattern layer, and the electronic module comprises a conductive film on the second surface of the insulating-material layer for protecting the component against electromagnetic radiation. ### Claim 7 (depends on 1) The electronic module of claim 1, comprising a plurality of components having flat contact zones metallurgically and electrically connected to the first solid contact bumps made on the first surface of the first conductive-pattern layer by means of said second solid contact bumps. ### Claim 8 (depends on 7) The electronic module of claim 7, wherein the plurality of components are electrically connected to each other by means of the first conductive-pattern layer. ### Claim 9 (depends on 1) The electronic module of claim 1, wherein the insulating-material layer is a glass-fiber reinforced epoxy sheet. ### Claim 10 (depends on 1) The electronic module of claim 1, wherein the insulating-material layer is a flexible organic sheet. ### Claim 11 (depends on 1) The electronic module of claim 1 wherein the metallurgically electrical connection are ultrasonic or thermo-compression connections. ### Claim 12 (depends on 11) The electronic module of claim 11 wherein the metallurgically electrical connections are facilitated by the presence of one or more metals selected from the group consisting of copper, aluminum, gold and tin. ### Claim 13 An electronic module, comprising: a first conductive-pattern layer having a first surface, a second conductive-pattern layer having a second surface, an insulating-material layer between the first surface of the first conductive-pattern layer and the second surface of the second conductive-pattern layer, first solderless contact bumps made on the first surface of the first conductive-pattern layer and metallurgically and electrically connected thereto, a component having fiat contact zones embedded in the insulating-material layer, second solderless contact bumps made on the flat contact zones and metallurgically and electrical connected thereto, and wherein the flat contact zones of the component are metallurgically, electrically and solderlessly connected to the first solderless contact bumps made on the first surface of the first conductive-pattern layer by means of the second solderless contact bumps made on said flat contact zones. ### Claim 14 (depends on 13) The electronic module of claim 13, wherein the first solderless contact bumps include a layered structure, containing at least two layers of at least two different materials. ### Claim 15 (depends on 14) The electronic module of claim 14, wherein the component is a microcircuit. ### Claim 16 (depends on 13) The electronic module of claim 13, wherein the second conductive-pattern layer is configured to protect the component against electromagnetic radiation. ### Claim 17 (depends on 13) The electronic module of claim 13, comprising a plurality of components having flat contact zones and second solderless contact bumps made on the flat contact zones, the flat contact zones being metallurgically and electrically connected to the first contact bumps made on the first surface of the first conductive-pattern layer by means of said second solderless contact bumps. ### Claim 18 (depends on 17) The electronic module of claim 17, wherein the plurality of components includes at least one microcircuit, and the plurality of components are electrically connected to each other by means of the first conductive-pattern layer. ### Claim 19 A multi-layered electronic module, comprising a plurality of electronic modules attached on top of each other, wherein at least one of the modules of said plurality comprises: a first conductive-pattern layer having a first surface, first solderless contact bumps made on the first surface of the first conductive-pattern layer, an insulating-material layer on the first surface of the first conductive-pattern layer, and a component embedded in the insulating-material layer and having flat contact zones, second solderless contact bumps made on the flat contact zones of the component, wherein, the flat contact zones of the component are metallurgically and electrically connected to the first conductive-pattern layer via the first solderless contact bumps made on the first surface of the first conductive-pattern layer and the second solderless contact bumps made on the flat contact zones of the component. ### Claim 20 (depends on 19) The multi-layered electronic module according to the claim 19, comprising a plurality of memory circuits. ### Claim 21 (depends on 19) The multi-layered electronic module according to claim 19, wherein the electronic modules are electrically connected to each other in order to form a multilayered functioning totality. ### Claim 22 A multi-layered electronic module, comprising a plurality of electronic modules attached on top of each other, wherein each of said plurality of electronic modules comprises: a first conductive-pattern layer having a first surface, first solderless contact bumps made on the first surface of the first conductive-pattern layer, an insulating material layer on the first surface of the first conductive-pattern layer, and a component embedded in the insulating-material layer, the component having flat contact zones, second solderless contact bumps made on the fiat contact zones of the component, and wherein the flat contact zones of the component are metallurgically, electrically and solderlessly connected to the first conductive-pattern layer by means of the second solderless contact bumps made on the fiat contact zones and the first solderless contact bumps made on the first surface of the first conductive-pattern layer. ### Claim 23 (depends on 22) The multi-layered electronic module according to claim 22, comprising a plurality of memory circuits. ### Claim 24 (depends on 22) The multi-layered electronic module according to claim 22, wherein the electronic modules are electrically connected to each other in order to form a multi-layered functioning totality. ### Claim 25 A multi-layered electronic module, comprising a plurality of electronic modules attached on top of each other, wherein at least one of the modules of said plurality comprises: a first conductive-pattern layer having a first surface, a second conductive-pattern layer having a second surface, an insulating-material layer between the first surface of the first conductive-pattern layer and the second surface of the second conductive-pattern layer, first solid contact bumps solderlessly made on the first surface of the first conductive-pattern layer and metallurgically and electrically connected thereto, a component having flat contact zones embedded in the insulating-material layer, second solid contact bump solderlessly made on the flat contact zones and metallurgically and electrically connected thereto, and wherein the first solid contact bumps such that the flat contact zones of the component are metallurgically and electrically connected to the first conductive pattern layer via respective first and second solid contact bumps. ### Claim 26 (depends on 25) The multi-layered electronic module according to claim 25, comprising a plurality of memory circuits. ### Claim 27 (depends on 25) The multi-layered electronic module according to claim 25, wherein the electronic modules are electrically connected to each other in order to form a multi-layered functioning totality.