# US 7,609,526 B2 · Circuit board

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- Number: US 7,609,526 B2
- Document ID: US7609526B2
- Status: Granted
- Kind: B2
- Application number: 11/230,336
- Filed: 2005-09-20
- Published: 2006-05-25
- Granted: 2009-10-27
- Earliest claimed: 2004-09-24
- Assignees: Meiko Electronics Co., Ltd.
- Inventors: Shunsuke Eiki
- Web page: https://patentgrep.com/patent/US7609526B2

## CPC

- H01G 4/012: Form of non-self-supporting electrodes
- H05K 1/162: {incorporating printed capacitors}
- H05K 2201/09236: Parallel layout
- H05K 2201/09881: Coating only between conductors, i.e. flush with the conductors
- H01G: CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE (selection of specified materials as dielectric H01B3/00; capacitors having potential barriers H10D1/62, H10K10/10)
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS

## Abstract

A circuit board including a capacitor structure formed on a surface of an insulating substrate, wherein the capacitor structure includes paired linear conductive layers arranged on the surface of the insulating substrate, parallel to each other with a predetermined distance between them, and a dielectric material filled in a groove defined by those surfaces of the paired linear conductive layers which face each other and the surface of the insulating substrate.

## Claims

### Claim 1

A circuit board, comprising:
an insulating substrate; and
a capacitor structure formed integrally on a surface of the insulating substrate;
wherein the capacitor structure includes paired linear conductive layers forming electrodes of the capacitor structure, each of said linear conductive layers is arranged directly in contact with said surface of the insulating substrate such that the paired linear conductive layers are parallel to each other with a predetermined distance therebetween, and each of said linear conductive layers has a facing surface which faces toward the facing surface of the other linear conductive layer;
wherein a dielectric material is filled in a groove defined by said surface of the insulating substrate and the respective facing surfaces of the paired linear conductive layers which face each other; and
wherein said respective facing surfaces of the paired linear conductive layers do not face toward said surface of the insulating substrate, and the paired linear conductive layers and the dielectric material are stacked along said surface of the insulating substrate.

### Claim 2 (depends on 1)

The circuit board according to claim 1, wherein a conductive circuit is formed on said surface of the insulating substrate at the same time that the linear conductive layers are formed on said surface of the insulating substrate.

### Claim 3 (depends on 1)

The circuit board according to claim 1, wherein the circuit board is a single-layer circuit board.

### Claim 4 (depends on 1)

The circuit board according to claim 1, wherein the circuit board is a multi-layer circuit board including a plurality of layers, and the capacitor structure is formed on at least one of the plurality of layers.

### Claim 5 (depends on 2)

The circuit board according to claim 2, wherein the circuit board is a single-layer circuit board.

### Claim 6 (depends on 2)

The circuit board according to claim 2, wherein the circuit board is a multi-layer circuit board including a plurality of layers, and the capacitor structure is formed on at least one of the plurality of layers.