# US 7,609,272 B1 · Partial texture loads > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,609,272 B1 - Document ID: US7609272B1 - Status: Granted - Kind: B1 - Application number: 11/010,972 - Filed: 2004-12-13 - Granted: 2009-10-27 - Earliest claimed: 2004-12-13 - Assignees: NVIDIA Corporation - Inventors: Emmett M. Kilgariff; Rui M. Bastos - Web page: https://patentgrep.com/patent/US7609272B1 ## CPC - G06T 15/005: {General purpose rendering architectures} - G06T 15/04: Texture mapping - G06T 15/80: Shading - G09G 5/363: {Graphics controllers} - G09G 2360/06: Use of more than one graphics processor to process data before displaying to one or more screens - G09G 2360/18: Use of a frame buffer in a display terminal, inclusive of the display panel - G06T: IMAGE DATA PROCESSING OR GENERATION, IN GENERAL - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Circuits, methods, and apparatus that provide for partial texture load instructions. Instead of one instruction that may take several shader passes to complete, several instructions are issued, where each instruction is an instruction to retrieve a part or portion of a texture. While each instruction is performed, the other shader circuits can perform other instructions, thus increasing the utilization of the shader circuits when large textures are read from memory. Since several shader passes may be required to read a texture, if a particular instruction needs the texture, one exemplary embodiment reorders instructions such that other instructions are performed before the particular instruction that needs the texture. ## Claims ### Claim 1 A method for rendering a computer generated image comprising: receiving a first instruction, the first instruction requiring a first texture, the first texture unavailable immediately to a first circuit; wherein the first texture is stored in a memory prior to receiving the first instruction; receiving a second instruction, the second instruction requiring a second texture, the second texture available immediately to the first circuit; reordering the first and second instructions; retrieving a first portion of the first texture from the memory; and while retrieving the first portion of the first texture, performing the second instruction using the first circuit. ### Claim 2 (depends on 1) The method of claim 1 further comprising: then retrieving a second portion of the first texture; and while retrieving the second portion of the first texture, performing a third instruction using the first circuit. ### Claim 3 (depends on 2) The method of claim 2 further comprising: then performing the first instruction using the first circuit. ### Claim 4 (depends on 3) The method of claim 3 wherein the first circuit is a shader circuit. ### Claim 5 (depends on 4) The method of claim 4 wherein the first portion of the first texture is retrieved from a memory using a texture circuit. ### Claim 6 (depends on 5) The method of claim 5, wherein the texture circuit is operable to perform filtering. ### Claim 7 (depends on 1) The method of claim 1, wherein the first texture is a pixel texture. ### Claim 8 (depends on 1) The method of claim 1, wherein the memory is a frame buffer. ### Claim 9 A computer readable medium encoded with a plurality of instructions for controlling a processor to perform an operation for rendering a computer generated image, the instructions comprising: receiving a first instruction, the first instruction requiring a first texture, the first texture unavailable immediately to a first circuit; wherein the first texture is stored in a memory prior to receiving the first instruction; receiving a second instruction, the second instruction requiring a second texture, the second texture available immediately to the first circuit; reordering the first and second instructions; retrieving a first portion of the first texture from the memory; and while retrieving the first portion of the first texture, performing the second instruction using the first circuit. ### Claim 10 (depends on 9) The computer readable medium of claim 9, wherein the instructions further comprise: then retrieving a second portion of the first texture; and while retrieving the second portion of the first texture, performing a third instruction using the first circuit. ### Claim 11 (depends on 10) The computer readable medium of claim 10, wherein the instructions further comprise: then performing the first instruction using the first circuit. ### Claim 12 (depends on 9) The computer readable medium of claim 9, wherein the first circuit is a shader. ### Claim 13 (depends on 9) The computer readable medium of claim 9, wherein the first portion of the first texture is retrieved from a memory using a texture circuit. ### Claim 14 A system comprising: a graphics processor including a shader configured to: receive a first instruction, the first instruction requiring a first texture, the first texture unavailable immediately to a first circuit; wherein the first texture is stored in a memory prior to receiving the first instruction; receive a second instruction, the second instruction requiring a second texture, the second texture available immediately to the first circuit; reorder the first and second instructions; retrieve a first portion of the first texture from the memory; and while retrieving the first portion of the first texture, perform the second instruction using the first circuit. ### Claim 15 (depends on 14) The system of claim 14, wherein the shader is further configured to: then retrieve a second portion of the first texture; and while retrieving the second portion of the first texture, perform a third instruction using the first circuit. ### Claim 16 (depends on 15) The system of claim 15, wherein the shader is further configured to then perform the first instruction using the first circuit. ### Claim 17 (depends on 14) The system of claim 14, wherein the first circuit is a shader circuit. ### Claim 18 (depends on 14) The system of claim 14, wherein the first portion of the first texture is retrieved from a memory using a texture circuit.