# US 7,609,192 B1 · Control of analog to digital conversion for analog I/O boards

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- Number: US 7,609,192 B1
- Document ID: US7609192B1
- Status: Granted
- Kind: B1
- Application number: 11/881,330
- Filed: 2007-07-26
- Granted: 2009-10-27
- Earliest claimed: 2005-06-20
- Assignees: The Math Works, Inc.
- Inventors: Michael A. Vetsch
- Web page: https://patentgrep.com/patent/US7609192B1

## CPC

- G01R 19/2509: {Details concerning sampling, digitizing or waveform capturing}
- G06F 3/05: Digital input using the sampling of an analogue quantity at regular intervals of time {, input from a/d converter or output to d/a converter}
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A system and method for converting analog signals to digital signals minimize the latency of the analog to digital conversion for real-time systems. The conversion system and method implements the hardware of an analog to digital converter input/output (I/O) board and a software-based I/O-driver in an expansion bus. The hardware of the ADC I/O board executes free-running conversion of an analog signal into digital form and stores the converted values in a first level of a buffer having two levels. Previously stored converted values are pushed to the second level of the buffer when a new value is written to the first level. The I/O driver then retrieves stored values from the second level of the buffer when needed by the real-time system and gates the buffer to prevent pushing during retrieval of values from the second level.

## Claims

### Claim 1

A computer-implemented method of controlling a conversion of a signal from an analog form to a digital form, comprising:
applying an analog signal to an input of an analog-to-digital converter;
converting the analog signal into a first digital value using the analog-to-digital converter;
buffering the first digital value in a first level of a buffer;
pushing a stored digital value from the first level of the buffer to a second level of the buffer;
retrieving the stored digital value from the second level of the buffer; and
preventing a driver code from becoming time-nondeterministic by completing retrieving before an upper response time.

### Claim 2 (depends on 1)

The computer-implemented method of claim 1, wherein converting and retrieving are performed in parallel.

### Claim 3 (depends on 1)

The computer-implemented method of claim 1, further comprising:
deploying a gate to prevent the pushing of the stored digital value from the first level of the buffer to a second level of the buffer; and
resuming the pushing of the stored the stored digital value from the first level of the buffer to a second level of the buffer once the gate is removed.

### Claim 4 (depends on 3)

The computer-implemented method of claim 3, wherein deploying is delayed until pushing is complete.

### Claim 5 (depends on 1)

The computer-implemented method of claim 1, wherein a plurality of entries of the first level of the buffer are packed into a single entry of the second level of the buffer.

### Claim 6

A computer-readable medium holding instructions for controlling a conversion of a signal from an analog form to a digital form with reduced latency, the medium comprising one or more instructions for:
applying an analog signal to an input of an analog-to-digital converter, wherein there exists one analog-to-digital converter for each analog signal channel;
simultaneously initiating a plurality of analog-to-digital converters to sample a plurality of analog signal channels simultaneously, without creating analog signal channel time skew;
converting the analog signal into a converted digital data using the analog-to-digital converter without requiring a software command to initiate a conversion;
buffering the converted digital data in a first level of a buffer;
pushing a stored converted digital data from the first level of the buffer to a second level of the buffer; and
retrieving the stored converted digital data from the second level of the buffer.

### Claim 7 (depends on 6)

The computer-readable medium of claim 6, wherein a maximum rate of the conversion is equal to a conversion time of the analog-to-digital converter.

### Claim 8 (depends on 7)

The computer-readable medium of claim 7, wherein the converted digital data is not older than the conversion time of the analog-to-digital converter resulting in immediate sampling.

### Claim 9 (depends on 6)

The computer-readable medium of claim 6, wherein a latency of the conversion is equal to (N*Ta)/2+Tp, wherein N represents a number of channels, Ta represents an atomic read and write access time and Tp represents a maximum delay pushing can cause.

### Claim 10 (depends on 6)

The computer-readable medium of claim 6, further comprising one or more instructions for:
minimizing an interval between converting the analog signal into the converted digital data and retrieving the stored converted digital data.