# US 7,608,919 B1 · Interconnect packaging systems

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- Number: US 7,608,919 B1
- Document ID: US7608919B1
- Status: Granted
- Kind: B1
- Application number: 11/599,257
- Filed: 2006-11-15
- Granted: 2009-10-27
- Earliest claimed: 2003-09-04
- Assignees: University of Notre Dame du Lac
- Inventors: Gary H. Bernstein; Patrick Fay; Wolfgang Porod; Qing Liu
- Web page: https://patentgrep.com/patent/US7608919B1

## CPC

- H10W 72/00: Interconnections or connectors in packages
- H05K 1/181: associated with surface mounted components
- H05K 1/182: associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
- H10D 62/117: {Shapes of semiconductor bodies}
- H10W 42/60: protecting against electrostatic charges or discharges, e.g. Faraday shields (integrated devices comprising arrangements for electrical protection H10D89/60)
- H10W 70/099: {Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers}
- H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40)
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/851: {Dispositions of multiple connectors or interconnections}
- H10W 72/90: Bond pads, in general
- H10W 90/00: Package configurations
- H05K 3/326: {the printed circuit having integral resilient or deformable parts, e.g. tabs or parts of flexible circuits (H05K3/365 takes precedence)}
- H05K 3/328: by welding
- H05K 2201/0314: Elastomeric connector or conductor, e.g. rubber with metallic filler
- H05K 2201/10454: Vertically mounted
- H05K 2201/10909: Materials of terminal, e.g. of leads or electrodes of components
- H10W 44/248: {for antennas}
- H10W 72/07227: {involving guiding structures, e.g. spacers or supporting members}
- H10W 72/07235: {Applying EM radiation, e.g. induction heating or using a laser}
- H10W 72/251: {Materials}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 72/834: {Interconnections on sidewalls of chips}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 90/24: at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
- H10W 90/284: {characterised by structural arrangements for measuring or testing}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

The present invention provides a quilt packaging system for microchip, a method for making such a quilt packaging system, microchips that may be used in a such a quilt packaging system, and methods for making such microchips.

## Claims

### Claim 1

A microchip packaging system comprising:
a first microchip having a convex shape comprising three or more edge surfaces, a plurality of said edge surfaces having one or more interconnect modules disposed thereon; and
at least a second microchip having a convex shape comprising three or more edge surfaces, a plurality of said edge surfaces having one or more interconnect nodules disposed thereon,
wherein a first edge surface of said second microchip is positioned contiguous to a first edge surface of said first microchip, and wherein at least one of said one or more interconnect nodules disposed on said first edge surface of said first microchip is configured to be in physical contact with at least one of said one or more interconnect nodules disposed on said first edge surface of second microchip so as to provide a direct electrical connection between said at least one edge surfaces of said first and second microchips.

### Claim 2 (depends on 1)

The system of claim 1, wherein said at least one interconnect nodule disposed on said first edge surfaces of said first and second microchips each protrude from said first edge surfaces.

### Claim 3 (depends on 1)

The system of claim 1, wherein at least one of said one or more interconnect nodules of said first microchip is deformable.

### Claim 4 (depends on 1)

The system of claim 1, wherein said first microchip is positioned in a first plane, and wherein said second microchip is positioned in said first plane adjacent to said first microchip.

### Claim 5 (depends on 1)

The system of claim 1, wherein said first microchip is positioned in a first plane, and wherein said second microchip is positioned in a second plane.

### Claim 6 (depends on 1)

The system of claim 1, further comprising:
at least a third microchip having one or more interconnect nodules disposed on an edge surface thereof, and wherein at least one of said one or more interconnect nodules of said third microchip is configured to be directly electrically connected to at least one of said one or more interconnect nodules of said first microchip.

### Claim 7 (depends on 1)

The system of claim 1, wherein said first microchip and said second microchip each have different convex shapes.

### Claim 8 (depends on 1)

The system of claim 1, wherein said first and second electrically interconnected microchips collectively comprise a single chip device.

### Claim 9 (depends on 1)

The system of claim 1, further comprising:
a female alignment element disposed on said first edge surface of said first microchip; and
a male alignment element, disposed on said first edge surface of said second microchip, configured to be inserted into said female alignment element to align said at least one interconnect module disposed on said first edge surface of said first microchip with said at least one interconnect nodule disposed on said first edge surface of said second microchip.

### Claim 10 (depends on 9)

The system of claim 9, wherein said at least one interconnect nodule disposed on said first edge surface of said first microchip is positioned in said female alignment element, and wherein said at least one interconnect nodule disposed on said first edge surface of said second microchip is positioned on said male alignment element, and wherein said microchips are electrically connected when said male alignment element is inserted into said female alignment element.

### Claim 11 (depends on 9)

The system of claim 9, wherein said female alignment element comprises an alignment notch, and wherein said male alignment element comprises an alignment tab.

### Claim 12 (depends on 11)

The system of claim 11, wherein said alignment notch has a concave trapezoidal shape, and wherein said alignment tab has a convex trapezoidal shape.

### Claim 13 (depends on 11)

The system of claim 11, wherein said alignment notch has a concave rectangular shape, and wherein said alignment tab has a convex rectangular shape.

### Claim 14

A quilt packaging system comprising:
a first electronic device having a convex shape comprising three or more edge surfaces, a plurality of said edge surfaces having one or more interconnect modules disposed thereon; and
at least a second electronic device having a convex shape comprising three or more edge surfaces, a plurality of said edge surfaces having one or more interconnect nodules disposed thereon,
wherein a first edge surface of said second electronic device is positioned contiguous to a first edge surface of said first electronic device, and wherein at least one of said one or more interconnect nodules disposed on said first edge surface of said first electronic device is configured to be in physical contact with at least one of said one or more interconnect nodules disposed on said first edge surface of second electronic device so as to provide a direct electrical connection between said at least one edge surfaces of said first and second electronic devices.

### Claim 15 (depends on 14)

The system of claim 14, wherein said at least one interconnect nodule disposed on said first edge surfaces of said first and second electronic devices each protrude from said first edge surfaces.

### Claim 16 (depends on 14)

The system of claim 14, wherein at least one of said one or more interconnect nodules of said first electronic device is deformable.

### Claim 17 (depends on 14)

The system of claim 14, wherein said first electronic device is positioned in a first plane, and wherein said second electronic device is positioned in said first plane adjacent to said first electronic device.

### Claim 18 (depends on 14)

The system of claim 14, wherein said first electronic device is positioned in a first plane, and wherein said second electronic device is positioned in a second plane.

### Claim 19 (depends on 14)

The system of claim 14, further comprising:
at least a third electronic device having one or more interconnect nodules disposed on an edge surface thereof, and wherein at least one of said one or more interconnect nodules of said third electronic device is configured to be directly electrically connected to at least one of said one or more interconnect nodules of said first electronic device.

### Claim 20 (depends on 14)

The system of claim 14, wherein said first electronic device and said second electronic device each have different convex shapes.

### Claim 21 (depends on 14)

The system of claim 14, further comprising:
a female alignment element disposed on said first edge surface of said first electronic device; and
a male alignment element, disposed on said first edge surface of said second electronic device, configured to be inserted into said female alignment element to align said at least one interconnect module disposed on said first edge surface of said first electronic device with said at least one interconnect nodule disposed on said first edge surface of said second electronic device.

### Claim 22 (depends on 21)

The system of claim 21, wherein said at least one interconnect nodule disposed on said first edge surface of said first electronic device is positioned in said female alignment element, and wherein said at least one interconnect nodule disposed on said first edge surface of said second electronic device is positioned on said male alignment element, and wherein said electronic devices are electrically connected when said male alignment element is inserted into said female alignment element.

### Claim 23 (depends on 21)

The system of claim 21, wherein said female alignment element comprises an alignment notch, and wherein said male alignment element comprises an alignment tab.

### Claim 24 (depends on 23)

The system of claim 23, wherein said alignment notch has a concave trapezoidal shape, and wherein said alignment tab has a convex trapezoidal shape.

### Claim 25 (depends on 23)

The system of claim 23, wherein said alignment notch has a concave rectangular shape, and wherein said alignment tab has a convex rectangular shape.