# US 7,608,917 B2 · Power semiconductor module > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 7,608,917 B2 - Document ID: US7608917B2 - Status: Granted - Kind: B2 - Application number: 11/749,211 - Filed: 2007-05-16 - Published: 2007-11-22 - Granted: 2009-10-27 - Earliest claimed: 2006-05-17 - Assignees: Hitachi, Ltd. - Inventors: Ryoichi Kajiwara; Kazuhiro Suzuki; Toshiaki Ishii; Kazutoshi Itou - Web page: https://patentgrep.com/patent/US7608917B2 ## CPC - H05K 3/284: {for encapsulating mounted components (H05K1/185 takes precedence)} - H10W 40/778: {in encapsulations} - H10W 70/611: {for connecting multiple chips together} - H10W 70/658: {for devices provided for in groups H10D8/00 - H10D48/00} - H10W 76/40: Fillings or auxiliary members in containers, e.g. centering rings (fillings or auxiliary members for thermal protection or control in containers or encapsulations H10W40/70) - H10W 90/00: Package configurations - H10W 90/401: {characterised by multiple insulating or insulated package substrates, interposers or RDLs} - H10W 90/811: {Multiple chips on leadframes} - H05K 1/0306: {Inorganic insulating substrates, e.g. ceramic, glass} - H05K 3/0058: {Laminating printed circuit boards onto other substrates, e.g. metallic substrates (H05K1/0281 takes precedence)} - H05K 2201/0715: provided by an outer layer of PCB - H05K 2201/10166: Transistor - H10W 40/255: {having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates} - H10W 72/07354: {changes in dispositions} - H10W 72/347: {Dispositions of multiple die-attach connectors} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL} - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A power semiconductor module and an inverter apparatus in which a device or a joining part is not mechanically damaged even when the temperature in use becomes a high temperature in the range of 175 to 250° C., resulting in excellent reliability at high temperature retaining test and thermal cycling test. Low thermal expansion ceramic substrates are disposed above and below the device. A material having a coefficient of thermal expansion of 10 ppm/K or less is disposed between the ceramic substrates. In addition, an inorganic material having a coefficient of thermal expansion in the range of 2 to 6 ppm/K or less is disposed around the device. ## Claims ### Claim 1 A power semiconductor module comprising: a power semiconductor device having a main electrode and a control electrode formed on a circuit face and a rear electrode formed on a face opposite to the circuit face; a ceramic substrate with printed circuit having metal electrodes formed on both faces of the ceramic substrate, the metal electrode being joined to the rear electrode of the power semiconductor device; a lead having metal electrodes formed on both faces of a ceramic substrate, the metal electrode being joined to the main electrode and the control electrode of the power semiconductor device; and a mold resin having a coefficient of thermal expansion of 10 ppm/K or less for sealing the ceramic substrate with printed circuit, the power semiconductor device and the lead so as to expose metal electrodes on a side of the ceramic substrate with printed circuit that is not joined to the power semiconductor device and metal electrodes on a side of the lead that is not joined to the power semiconductor device to outside. ### Claim 2 (depends on 1) The power semiconductor module according to claim 1, wherein an insulating material having a coefficient of thermal expansion in a range of 2 to 6 ppm/K is disposed between the ceramic substrate with printed circuit and the lead. ### Claim 3 (depends on 2) The power semiconductor module according to claim 2, wherein a metal layer is formed on a face of the insulating material opposed to the ceramic substrate with printed circuit, and on a face of the insulating material opposed to the lead, and the metal layer is joined to the ceramic substrate with printed circuit and the lead by a solder material. ### Claim 4 (depends on 2) The power semiconductor module according to claim 2, wherein the insulating material is substantially equal in thickness to the power semiconductor device. ### Claim 5 (depends on 1) The power semiconductor module according to claim 1, wherein the substrate with printed circuit and the rear electrode, and the lead and the main electrode and the control electrode have a yield strength higher than that of a material of the metal electrodes, and joined by a solder material having a melting point of at least 260° C. ### Claim 6 (depends on 5) The power semiconductor module according to claim 5, wherein the solder material is SnSbAgCu solder. ### Claim 7 (depends on 1) The power semiconductor module according to claim 1, wherein the ceramic substrate included in the substrate with printed circuit and the lead is Si3N4. ### Claim 8 (depends on 1) The power semiconductor module according to claim 1, wherein a ceramic substrate that is equal in dimensions to the ceramic substrate with printed circuit is buried in the mold resin or adhered onto the mold resin. ### Claim 9 A power semiconductor module comprising: a ceramic substrate with printed circuit having metal electrodes formed on both faces of a ceramic substrate; at least one power semiconductor device; an insulating inorganic material having a coefficient of thermal expansion in a range of 2 to 6 ppm/K; and a mold resin material having a coefficient of thermal expansion of 10 ppm/K or less, wherein the ceramic substrate with printed circuit is disposed on each of above and below the device, electrodes located above and below the device are joined to the upper and lower metal electrodes on ceramic substrates with printed circuit with an alloy phase having a temperature at solidus line of at least 260° C., the inorganic material is disposed around the semiconductor device, and a space between the ceramic substrates with printed circuit is filled with the mold resin material. ### Claim 10 (depends on 9) The power semiconductor module according to claim 9, wherein a low thermal expansion metal material having a coefficient of thermal expansion of 10 ppm/K or less is joined to a main electrode and a control electrode on a circuit face side of the power semiconductor device, and the device and the ceramic substrate with printed circuit are joined respectively to the low thermal expansion metal material and the other ceramic substrate with printed circuit with an alloy layer having a mechanical characteristic that is higher than a yield strength of a material of the metal electrode. ### Claim 11 (depends on 9) The power semiconductor module according to claim 9, wherein upper constituent materials and lower constituent materials constitute a structure that is substantially symmetrical about the power semiconductor device. ### Claim 12 A power semiconductor module comprising: a ceramic substrate with printed circuit having metal electrodes formed on both faces of a ceramic substrate; at least one power semiconductor device; an insulating inorganic material having a coefficient of thermal expansion in a range of 2 to 6 ppm/K; a sealed capsule comprising a plurality of electric input and output parts electrically isolated by the insulating inorganic material; and an insulating gaseous or liquid coolant, wherein the ceramic substrate with printed circuit is disposed on each of above and below the power semiconductor device, electrodes are joined to the metal electrodes on ceramic substrates with printed circuit with an alloy layer having a melting point of at least 260° C., the inorganic material is disposed around the semiconductor device, those constituent materials are incorporated in the sealed capsule, inside of the sealed capsule is filled with the coolant, and the metal electrodes on ceramic substrates with printed circuit are electrically connected to the electric input and output parts. ### Claim 13 (depends on 12) The power semiconductor module according to claim 12, wherein a constituent material of the sealed capsule located above and below the ceramic substrates with printed circuit is formed of a metal plate including Cu or Al having a thickness of at least 1 mm as a main constituent element. ### Claim 14 (depends on 12) An inverter apparatus constructed by stacking the power semiconductor modules according to claim 12 with a high thermal conductive plate between and applying pushing pressure to the power semiconductor modules via high thermal conductive plates located at top and bottom ends. ### Claim 15 (depends on 14) The inverter apparatus according to claim 14, wherein a high thermal conductive material having a low yield strain is disposed between the high thermal conductive plate and the power semiconductor module.