# US 7,608,904 B2 · Semiconductor device components with conductive vias and systems including the components

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- Number: US 7,608,904 B2
- Document ID: US7608904B2
- Status: Granted
- Kind: B2
- Application number: 11/717,294
- Filed: 2007-03-12
- Published: 2007-07-26
- Granted: 2009-10-27
- Earliest claimed: 2003-09-23
- Assignees: Micron Technology, Inc.
- Inventors: Nishant Sinha
- Web page: https://patentgrep.com/patent/US7608904B2

## CPC

- H10W 70/635: {Through-vias}
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/0261: {characterised by the filling method or the material of the conductive fill}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/216: {characterised by dielectric material at least partially filling the via holes, e.g. covering the through-semiconductor vias in the via holes}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device component includes at least one conductive via. The at least one conductive via may include a seed layer for facilitating adhesion of a conductive material within the via aperture, a barrier material and solder, or a silicon-containing filler. Systems including such semiconductor device components are also disclosed.

## Claims

### Claim 1

An intermediate semiconductor component, comprising:
a substrate having a first surface and an opposite, second surface and including an aperture that communicates with the first surface and extends partially through the substrate; and
at least one via extending into the first surface of the substrate and terminating short of the opposite, second surface and including a seed layer comprising conductive material for facilitating adhesion of conductive material within the at least one via at least partially over a surface of the aperture, an annular conductive layer contacting the seed layer, and a filler material occupying a remainder of the via, the filler material circumscribed by and contacting the annular conductive layer.

### Claim 2 (depends on 1)

The intermediate semiconductor component of claim 1, wherein the annular conductive layer comprises a metal layer formed on the seed layer.

### Claim 3 (depends on 2)

The intermediate semiconductor component of claim 2, wherein the seed layer comprises a conductive material selected from the group consisting of titanium nitride, titanium, tantalum nitride, copper, and a polysilicon.

### Claim 4 (depends on 2)

The intermediate semiconductor component of claim 2, wherein the metal layer is selected from the group of metals consisting of nickel, cobalt, copper, silver, titanium, iridium, gold, tungsten, tantalum, molybdenum, platinum, palladium, nickel-phosphorus, palladium-phosphorus, cobalt-phosphorus, a Co—W—P alloy, alloys of the foregoing metals and mixtures of any of the foregoing.

### Claim 5 (depends on 1)

The intermediate semiconductor component of claim 1, wherein the filler material is selected from the group consisting of spin-on-glass, polysilicon, solder paste and solder.

### Claim 6 (depends on 1)

The intermediate semiconductor component of claim 1, further comprising:
an insulative layer located between the annular conductive layer and the substrate.

### Claim 7 (depends on 1)

The intermediate semiconductor component of claim 1, further comprising:
a barrier layer on the first surface.

### Claim 8

A semiconductor device component, comprising:
a substrate having a first surface and an opposite, second surface; and
at least one via, comprising:
an annular conductive layer extending from the first surface of the substrate to the opposite, second surface of the substrate;
a silicon-containing filler material comprising polysilicon circumscribed by the annular conductive layer; and
at least one bond pad overlying at least a portion of the at least one via on at least one of the first surface and the opposite, second surface of the substrate.

### Claim 9 (depends on 8)

The semiconductor device component of claim 8, wherein the annular conductive layer is metal.

### Claim 10 (depends on 8)

The semiconductor device component of claim 8, wherein the annular conductive layer comprises an electroless plated metal layer and a seed layer, wherein the seed layer is located between the electroless plated metal layer and the substrate.

### Claim 11 (depends on 10)

The semiconductor device component of claim 10, wherein the seed layer comprises a material selected from the group of conductive materials consisting of titanium nitride, titanium, tantalum nitride, copper, and silicon nitride.

### Claim 12 (depends on 10)

The semiconductor device component of claim 10, wherein the electroless plated metal layer is selected from the group of metals consisting of nickel, cobalt, copper, silver, titanium, iridium, gold, tungsten, tantalum, platinum, palladium, molybdenum, nickel-phosphorus, palladium-phosphorus, cobalt-phosphorus, a Co—W—P alloy, alloys of the foregoing metals and mixtures of any of the foregoing.

### Claim 13 (depends on 8)

The semiconductor device component of claim 8, further comprising: an insulative layer located between the annular conductive layer and the substrate.

### Claim 14

A system comprising:
a microprocessor; and
at least one memory device in communication with the microprocessor, comprising:
a substrate having a first surface and an opposite, second surface; and
at least one via, comprising:
an annular layer of a conductive material extending from the first surface of the substrate to the opposite, second surface of the substrate and comprising an electroless plated metal layer and a seed layer; and
a silicon-containing filler material comprising polysilicon circumscribed by the annular layer of the conductive material, the filler material extending from the first surface of the substrate to the opposite, second surface of the substrate.

### Claim 15 (depends on 14)

The system of claim 14, wherein the at least one memory device further comprises at least one bond pad overlying at least a portion of the at least one via on at least one of the first surface and the opposite, second surface of the substrate.

### Claim 16 (depends on 14)

The system of claim 14, wherein the annular layer of the conductive material is metal.

### Claim 17 (depends on 14)

The system of claim 14, wherein the seed layer comprises a material selected from the group of conductive materials consisting of titanium nitride, titanium, tantalum nitride, copper, and silicon nitride.

### Claim 18 (depends on 14)

The system of claim 14, wherein the electroless plated metal layer is selected from the group of metals consisting of nickel, cobalt, copper, silver, titanium, iridium, gold, tungsten, tantalum, molybdenum, platinum, palladium, nickel-phosphorus, palladium-phosphorus, cobalt-phosphorus, a Co—W—P alloy, alloys of the foregoing metals and mixtures of any of the foregoing.

### Claim 19 (depends on 14)

The system of claim 14, further comprising:
a passivation layer located between the annular layer and the substrate.

### Claim 20

A semiconductor component, comprising:
a substrate having a first surface and an opposite, second surface; and
at least one via, comprising:
an electrically insulative layer on at least one sidewall of the substrate that at least partially defines at least one aperture through the substrate; and
a conductive filler material comprising solder extending from the first surface of the substrate to the opposite, second surface of the substrate, in contact with the electrically insulative layer, and isolated from the substrate by at least the electrically insulative layer.

### Claim 21 (depends on 20)

The semiconductor device component of claim 20, further comprising:
at least one bond pad overlying at least a portion of the at least one via on at least one of the first surface and the opposite, second surface of the substrate.

### Claim 22 (depends on 20)

The semiconductor device component of claim 20, wherein the electrically insulative layer comprises an insulative material located directly between the conductive filler material and the substrate.

### Claim 23

A system comprising:
a microprocessor; and
at least one memory device in communication with the microprocessor comprising:
a substrate having a first surface and an opposite, second surface; and
at least one via, comprising:
an electrically insulative layer; and
a conductive filler material comprising solder, extending from the first surface of the substrate to the opposite, second surface of the substrate, contacting the electrically insulative layer, and electrically isolated from the substrate by at least the electrically insulative layer.

### Claim 24 (depends on 23)

The system of claim 23, wherein the at least one memory device further comprises at least one bond pad overlying at least a portion of the at least one via on at least one of the first surface and the opposite, second surface of the substrate.

### Claim 25 (depends on 23)

The system of claim 23, wherein the electrically insulative layer comprises an insulative material that contacts the substrate.

### Claim 26

A semiconductor device component, comprising:
a substrate having a first surface and an opposite, second surface; and
at least one via, comprising:
an annular conductive layer comprising an electroless plated metal layer and a seed layer located between the electroless plated metal layer and the substrate, the annular conductive layer extending from the first surface of the substrate to the opposite, second surface of the substrate; and
a silicon-containing filler material comprising polysilicon circumscribed by the annular conductive layer.

### Claim 27

A system comprising:
a microprocessor; and
at least one memory device in communication with the microprocessor, comprising:
a substrate having a first surface and an opposite, second surface; and
at least one via, comprising:
an annular layer of a conductive material extending from the first surface of the substrate to the opposite, second surface of the substrate; and
a silicon-containing filler material comprising polysilicon circumscribed by the annular layer of the conductive material, the filler material extending from the first surface of the substrate to the opposite, second surface of the substrate; and
at least one bond pad overlying at least a portion of the at least one via on at least one of the first surface and the opposite, second surface of the substrate.
