# US 7,608,900 B2 · Semiconductor device and method of manufacturing and inspection thereof

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- Number: US 7,608,900 B2
- Document ID: US7608900B2
- Status: Granted
- Kind: B2
- Application number: 11/503,945
- Filed: 2006-08-15
- Published: 2007-03-01
- Granted: 2009-10-27
- Earliest claimed: 2005-08-31
- Assignees: Oki Semiconductor Co., Ltd.
- Inventors: Yoshihide Tasaki
- Web page: https://patentgrep.com/patent/US7608900B2

## CPC

- G01P 15/123: {by piezo-resistive elements, e.g. semiconductor strain gauges}
- B81C 99/004: {during manufacturing}
- G01P 15/0802: {Details}
- G01P 15/125: by capacitive pick-up
- B81B 2201/0235: Accelerometers
- G01P 2015/0842: {the mass being of clover leaf shape}
- G01P: MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT (measuring or recording blood flow A61B5/02, A61B8/06; monitoring speed or deceleration of electrically-propelled vehicles B60L3/00; vehicle lighting systems adapted to indicate speed B60Q1/54; determining position or course in navigation, measuring ground distance in geodesy or surveying G01C; combined measuring devices for measuring two or more variables of movement G01C23/00; measuring velocity of sound G01H; measuring velocity of light G01J7/00; measuring direction or velocity of solid objects by reception or emission of radiowaves or other waves and based on propagation effects, e.g. Doppler effect, propagation time, direction of propagation, G01S; measuring speed of nuclear radiation G01T; measuring acceleration of gravity G01V; {measuring or recording the speed of trains B61L23/00; speed indicators incorporated in motor vehicles B60K35/00; measuring frequency or phase G01R; traffic control G08G})
- B81C: PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS (making microcapsules or microballoons B01J13/02; processes or apparatus specially adapted for the manufacture or treatment of piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/01)
- B81B: MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES (piezoelectric, electrostrictive or magnetostrictive elements per se H10N30/00, H10N35/00)

## Abstract

An accelerator sensor includes a semiconductor substrate having a main front surface and a main rear surface, a first groove portion being formed along a front surface pattern, in the main front surface, a second groove portion being formed along a rear surface pattern, in the main rear surface, a through-hole being formed because of connection between at least parts of the first groove portion and the second groove portion and at least one groove width variation portion being formed in at least one of inner walls of the first groove portion. An offset of the rear surface pattern to the front surface pattern can be inspected easily by existence of the groove width variation portion.

## Claims

### Claim 1

A semiconductor device comprising:
a semiconductor substrate having a main front surface and a main rear surface;
a first groove portion along a front surface pattern, in the main front surface;
a second groove portion along a rear surface pattern, in the main rear surface,
at least parts of said first groove portion and said second groove portion overlap so that the overlapping parts of the first and second groove portions are through-holes that extend entirely through the semiconductor substrate; and
at least one groove width variation portion including a concave portion extending into at least one inner wall of said first groove portion at the through-holes,
wherein a part of said concave portion of said at least one groove width variation portion does not overlap with the second groove portion, and
wherein said at least one groove width variation portion includes a stepwise shape in a plane parallel to said main front surface.

### Claim 2 (depends on 1)

The semiconductor device as recited in claim 1, wherein said first groove portion comprises a plurality of partial grooves and said at least one groove width variation portion includes a plurality of groove width variation portions, each at respective different ones of said partial grooves.

### Claim 3 (depends on 2)

The semiconductor device as recited in claim 2, wherein each of said main front surface and said main rear surface has a rectangular shape, and said partial grooves are, respectively, four rectangular grooves, and said groove width variation portions are respectively positioned at positions respectively corresponding to four sides of said semiconductor substrate.

### Claim 4 (depends on 1)

The semiconductor device as recited in claim 1, wherein a spindle portion is located at a central region of said semiconductor substrate, and four cantilever portions resiliently support the spindle portion to an edge of the semiconductor substrate.

### Claim 5 (depends on 3)

The semiconductor device as recited in claim 3, wherein a spindle portion is positioned at a central region of said semiconductor substrate, and four cantilever portions resiliently support the spindle portion to an edge of said semiconductor substrate.

### Claim 6

A semiconductor device comprising:
a semiconductor substrate having a main front surface and a main rear surface;
a first groove portion along a front surface pattern, in the main front surface;
a second groove portion along a rear surface pattern, in the main rear surface,
at least parts of said first groove portion and said second groove portion overlap so that the overlapping parts of the first and second groove portions are through-holes that extend entirely through the semiconductor substrate; and
at least one groove width variation portion including a concave portion extending into at least one inner wall of said first groove portion at the through-holes,
wherein a part of said concave portion of said at least one groove width variation portion does not overlap with the second groove portion, and
wherein said first groove portion comprises a plurality of partial grooves and said at least one groove width variation portion includes a plurality of groove width variation portions, each at respective different ones of said partial grooves.

### Claim 7 (depends on 6)

The semiconductor device as recited in claim 6, wherein each of said main front surface and said main rear surface has a rectangular shape, and said partial grooves are, respectively, four rectangular grooves, and said groove width variation portions are respectively positioned at positions respectively corresponding to four sides of said semiconductor substrate.

### Claim 8

A method of manufacturing a semiconductor device comprising:
providing a semiconductor substrate having a main front surface and a main rear surface;
forming a first groove portion along a front surface pattern, in said main front surface; and
forming a second groove portion along a rear surface pattern in said main rear surface, after said forming a first groove portion,
at least parts of said first groove portion and said second groove portion overlap so that the overlapping parts of the first and second groove portions are through-holes that extend entirely through the semiconductor substrate;
wherein said forming a first groove portion also includes forming at least one groove width variation portion including a concave portion extending into at least one inner wall of said first groove portion at the through-holes, so that a part of the concave portion of said at least one groove width variation portion does not overlap with the second groove portion, and
wherein said at least one groove width variation portion also includes a convex portion that protrudes from the at least one inner wall into the through-holes.

### Claim 9 (depends on 8)

The method of manufacturing the semiconductor device as recited in claim 8, wherein said at least one groove width variation portion has a stepwise shape in a plane parallel to said main front surface.

### Claim 10 (depends on 9)

The method of manufacturing the semiconductor device as recited in claim 9, wherein said first groove portion comprises a plurality of partial grooves and said groove width variation portion includes a plurality of the groove width variation portions, each being formed at respective different ones of said partial grooves.

### Claim 11 (depends on 8)

The method of manufacturing the semiconductor device as recited in claim 8, wherein said first groove portion comprises a plurality of partial grooves and said groove width variation portion includes a plurality of the groove width variation portions, each being formed at respective different ones of said partial grooves.

### Claim 12

A method of manufacturing a semiconductor device comprising:
providing a semiconductor substrate having a main front surface and a main rear surface;
forming a first groove portion along a front surface pattern, in said main front surface; and
forming a second groove portion along a rear surface pattern in said main rear surface, after said forming a first groove portion,
at least parts of said first groove portion and said second groove portion overlap so that the overlapping parts of the first and second groove portions are through-holes that extend entirely through the semiconductor substrate;
wherein said forming a first groove portion also includes forming at least one groove width variation portion including a concave portion extending into at least one inner wall of said first groove portion at the through-holes, so that a part of the concave portion of said at least one groove width variation portion does not overlap with the second groove portion, and
wherein said at least one groove width variation portion has a stepwise shape in a plane parallel to said main front surface.

### Claim 13 (depends on 12)

The method of manufacturing the semiconductor device as recited in claim 12, wherein said first groove portion comprises a plurality of partial grooves and said groove width variation portion includes a plurality of the groove width variation portions, each being formed at respective different ones of said partial grooves.

### Claim 14

A semiconductor device comprising:
a semiconductor substrate having a main front surface and a main rear surface;
a first groove portion along a front surface pattern, in the main front surface;
a second groove portion along a rear surface pattern, in the main rear surface,
at least parts of said first groove portion and said second groove portion overlap so that the overlapping parts of the first and second groove portions are through-holes that extend entirely through the semiconductor substrate; and
at least one groove width variation portion including a concave portion extending into at least one inner wall of said first groove portion at the through-holes,
wherein a part of said concave portion of said at least one groove width variation portion does not overlap with the second groove portion, and
wherein said at least one groove width variation portion includes a convex portion that protrudes from the at least one inner wall into the through-holes.
