# US 7,608,899 B2 · Semiconductor device

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- Number: US 7,608,899 B2
- Document ID: US7608899B2
- Status: Granted
- Kind: B2
- Application number: 11/936,443
- Filed: 2007-11-07
- Published: 2008-03-13
- Granted: 2009-10-27
- Earliest claimed: 2001-05-22
- Assignees: Renesas Technology Corp.
- Inventors: Tomio Iwasaki; Hiroshi Moriya; Hideo Miura; Shuji Ikeda
- Web page: https://patentgrep.com/patent/US7608899B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 30/6739: {Conductor-insulator-semiconductor electrodes}
- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 62/405: {Orientations of crystalline planes}
- H10D 64/0112: {using conductive layers comprising silicides}
- H10D 64/0134: {with a treatment, e.g. annealing, after the formation of the insulator and before the formation of the conductor}
- H10D 64/01342: {by deposition, e.g. evaporation, ALD or laser deposition (H10D64/01344 takes precedence)}
- H10D 64/685: {being perpendicular to the channel plane}
- H10D 64/689: {having ferroelectric layers}
- H10D 64/691: {comprising metallic compounds, e.g. metal oxides or metal silicates (insulators comprising nitrogen H10D64/693)}
- H10D 84/0128: {Manufacturing their channels}
- H10D 84/0144: {Manufacturing their gate insulating layers}
- H10B 12/03: {Making the capacitor or connections thereto}
- H10B 12/05: {Making the transistor}
- H10D 64/0132: {the conductor being a metallic silicide}
- H10D 64/668: {the layer being a silicide, e.g. TiSi2}
- H10D 64/669: {the conductor further comprising additional layers of alloy material, compound material or organic material, e.g. TaN/TiAlN}
- H10P 14/6328: {Deposition from the gas or vapour phase}
- H10P 14/69392: {the material containing hafnium, e.g. HfO2}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

Diffusion layers 2-5 are formed on a silicon substrate 1, and gate dielectric films 6, 7 and gate lectrodes 8, 9 are formed on these diffusion layers 2-5 so as to be MOS transistors. Zirconium oxide or hafnium oxide is used as a major component of gate dielectric films 6, 7. Gate dielectric films 6, 7 are formed, for example, by CVD. As substrate 1, there is used one of which the surface is (111) crystal face so as to prevent diffusion of oxygen into silicon substrate 1 or gate electrodes 8, 9. In case of using a substrate of which the surface is (111) crystal face, diffusion coefficient of oxygen is less than 1/100 of the case in which a silicon substrate of which the surface is (001) crystal face is used, and oxygen diffusion is controlled. Thus, oxygen diffusion is controlled, generation of leakage current is prevented and properties are improved. There is realized a semiconductor device having high reliability and capable of preventing deterioration of characteristics concomitant to miniaturization.

## Claims

### Claim 1

A semiconductor device comprising a silicon substrate, gate dielectric films mostly composed of hafnium oxide and formed on a major surface of said silicon substrate, and gate electrode films formed in contact with said gate dielectric films, said major surface of said silicon substrate being parallel to Si (111) crystal face,
wherein said gate electrode films are mostly composed of cobalt silicide or silicon,
wherein said gate dielectric films contain titanium in a concentration of from 0.01 at. % inclusive to 15 at. % inclusive.

### Claim 2 (depends on 1)

A semiconductor device according to claim 1, wherein said gate dielectric films contain titanium in a concentration of from 0.03 at. % inclusive to 10 at. % inclusive.

### Claim 3

A semiconductor device comprising a silicon substrate, gate dielectric films formed on a major surface of said silicon substrate, gate electrode films formed on said gate dielectric films, and wiring films mostly composed of cobalt silicide or nickel silicide, said major surface being formed so as to be (111) crystal face of the substrate, wherein the substrate having (111) orientation is used to prevent diffusion of cobalt from the wiring films into the substrate,
wherein said gate dielectric films are mostly composed of zirconium oxide,
wherein said gate electrode films are mostly composed of cobalt silicide or silicon,
wherein said gate dielectric films contain hafnium in a concentration of from 0.01 at. % inclusive to 15 at. % inclusive.

### Claim 4 (depends on 3)

A semiconductor device according to claim 3, wherein said gate dielectric films contain titanium in a concentration of from 0.005 at. % inclusive to 15 at. % inclusive.

### Claim 5

A semiconductor device comprising a silicon substrate, gate dielectric films formed on a major surface of said silicon substrate, gate electrode films formed on said gate dielectric films, and wiring films mostly composed of cobalt silicide or nickel silicide, said major surface being formed so as to be (111) crystal face of the substrate, wherein the substrate having (111) orientation is used to prevent diffusion of cobalt from the wiring films into the substrate,
wherein said gate dielectric films are mostly composed of zirconium oxide,
wherein said gate electrode films are mostly composed of cobalt silicide or silicon,
wherein said gate dielectric films contain titanium in a concentration of from 0.005 at. % inclusive to 15 at. % inclusive.