# US 7,608,891 B2 · Thin film transistor, circuit apparatus and liquid crystal display

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- Number: US 7,608,891 B2
- Document ID: US7608891B2
- Status: Granted
- Kind: B2
- Application number: 11/469,748
- Filed: 2006-09-01
- Published: 2007-02-01
- Granted: 2009-10-27
- Earliest claimed: 2006-09-01
- Assignees: Kabushiki Kaisha Ekisho Sentan Gijutsu Kaihatsu Center
- Inventors: Masato Hiramatsu; Masakiyo Matsumura; Mikihiko Nishitani; Yoshinobu Kimura; Yoshitaka Yamamoto
- Web page: https://patentgrep.com/patent/US7608891B2

## CPC

- H10D 30/6757: {characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715)}
- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes}
- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 62/40: Crystalline structures
- H10D 86/0251: {characterised by increasing the uniformity of device parameters}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A thin film transistor includes a one conductive type semiconductor layer (11); a source region (12) and a drain region (13) which are separately provided in the semiconductor layer; and a gate electrode (14) provided above or below the semiconductor layer with an insulating film interposed therebetween, wherein the width (Ws) of the junction face between the source region and the channel (16) which is provided between the source region and drain region, is different from the width (Wd) of the junction face between the above channel region and the drain region.

## Claims

### Claim 1

A thin film semiconductor device, comprising:
a substrate;
a polycrystalline silicon film provided on said substrate and having plural long and slender grains having a longitudinal grain direction; and
a thin film transistor having an active layer in said amorphous silicon film;
wherein a grain boundary between said grains adjacent to each other extends along the longitudinal direction of said grains;
wherein said thin film transistor has a source region and a drain region having width directions and arranged at intervals from each other along said grain boundary in said active layer, a source electrode connected with said source region through multiple contact holes, and a drain electrode connected with said drain region through multiple contact holes; and
wherein said contact holes are arranged respectively in said source region and said drain region in the respective width directions of said source region and said drain region in each said grain such that an electric current density becomes uniform.

### Claim 2 (depends on 1)

A thin film semiconductor device as claimed in claim 1, further comprising:
another thin film transistor having components similar to those of said thin film transistor,
wherein one thin film transistor is an N-type thin film transistor and the other is a P-type thin film transistor,
said N-type and P-type thin film transistors constituting a complementary type circuit formed so as to be point-symmetric with respect to each other in one grain.

### Claim 3 (depends on 1)

A thin film semiconductor device as claimed in claim 1, in which said contact holes are arranged to facilitate uniform electric current density in electric current flow along the grain boundary.

### Claim 4 (depends on 2)

A thin film semiconductor device as claimed in claim 2, in which said contact holes are arranged to facilitate uniform electric current density in electric current flow along the grain boundary.