# US 7,608,535 B2 · Method for forming metal contact in semiconductor device

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- Number: US 7,608,535 B2
- Document ID: US7608535B2
- Status: Granted
- Kind: B2
- Application number: 11/618,695
- Filed: 2006-12-29
- Published: 2008-01-03
- Granted: 2009-10-27
- Earliest claimed: 2006-06-30
- Assignees: Hynix Semiconductor Inc.
- Inventors: Hyun Phill Kim
- Web page: https://patentgrep.com/patent/US7608535B2

## CPC

- H10W 20/057: {by selectively depositing, e.g. by using selective CVD or plating}
- H10W 20/032: {of conductive barrier, adhesion or liner layers}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An interlayer insulation layer is formed on a semiconductor substrate to cover a lower wiring layer that is also formed on the semiconductor substrate. A contact hole to expose a surface of the lower wiring layer is formed by etching the interlayer insulation film. A wetting layer is formed on an inner wall of the contact hole. An anti-deposition layer is formed around an entrance of the contact hole to prevent an aluminum layer from being deposited around the entrance of the contact hole. The contact hole is filled with the aluminum layer.

## Claims

### Claim 1

A method for forming a metal contact in a semiconductor device, the method comprising:
forming an interlayer insulation layer over a lower wiring layer that is formed over the semiconductor substrate;
etching the interlayer insulation layer to form a contact hole, wherein the contact hole exposes a surface of the lower wiring layer;
forming a wetting layer on an inner wall of the contact hole;
forming an anti-deposition layer comprising tungsten (W) around an entrance of the contact hole to prevent an aluminum layer from being deposited around the entrance of the contact hole; and
filling the contact hole with the aluminum layer.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the wetting layer formed on the inner wall of the contact hole includes titanium (Ti).

### Claim 3 (depends on 2)

The method according to claim 2, wherein the wetting layer is formed using a self ionized plasma (SIP) process.

### Claim 4 (depends on 1)

The method according to claim 1, wherein the anti-deposition layer is formed by a physical vapor deposition (PVD) process.

### Claim 5 (depends on 1)

The method according to claim 1, wherein the filling of the contact hole using the aluminum layer comprises:
depositing the aluminum layer over the semiconductor substrate formed with the anti-deposition layer; and
reflowing the aluminum layer to fill the contact hole.

### Claim 6 (depends on 5)

The method according to claim 5, wherein the aluminum layer is formed by a chemical vapor deposition (CVD) process.

### Claim 7 (depends on 5)

The method according to claim 5, further comprising:
after the filling of the contact hole using the aluminum layer, forming an upper wiring layer to be connected to the lower wiring layer by depositing an aluminum layer over a surface of the resultant semiconductor substrate.

### Claim 8 (depends on 7)

The method according to claim 7, wherein the aluminum layer used to form the upper wiring layer is deposited in-situ within an aluminum layer reflow apparatus.