# US 7,608,515 B2 · Diffusion layer for stressed semiconductor devices

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 7,608,515 B2
- Document ID: US7608515B2
- Status: Granted
- Kind: B2
- Application number: 11/353,309
- Filed: 2006-02-14
- Published: 2007-08-16
- Granted: 2009-10-27
- Earliest claimed: 2006-02-14
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Hao-Yu Chen; Shui-Ming Cheng
- Web page: https://patentgrep.com/patent/US7608515B2

## CPC

- H10P 30/204: {into Group IV semiconductors}
- H10D 30/0275: {forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions}
- H10D 30/797: {being in source or drain regions, e.g. SiGe source or drain}
- H10D 62/021: {Forming source or drain recesses by etching e.g. recessing by etching and then refilling}
- H10P 30/208: {of electrically inactive species}
- H10D 62/822: comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
- H10D 64/021: {using multiple gate spacer layers, e.g. bilayered sidewall spacers}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A diffusion layer for semiconductor devices is provided. In accordance with embodiments of the present invention, a semiconductor device, such as a transistor, comprises doped regions surrounded by a diffusion barrier. The diffusion barrier may be formed by recessing regions of the substrate and implanting fluorine or carbon ions. A silicon layer may be epitaxially grown over the diffusion barrier in the recessed regions. Thereafter, the recessed regions may be filled and doped with a semiconductor or semiconductor alloy material. In an embodiment, a semiconductor alloy material, such as silicon carbon, is selected to induce a tensile stress in the channel region for an NMOS device, and a semiconductor alloy material, such as silicon germanium, is selected to induce a compressive stress in the channel region for a PMOS device.

## Claims

### Claim 1

A method of forming a semiconductor device, the method comprising:
forming a gate electrode on a substrate;
forming sacrificial spacers along opposing sidewalls of the gate electrode;
forming recesses in the substrate on opposing sides of the gate electrode, the recesses extending under the sacrificial spacers;
forming a diffusion barrier in the recesses of the substrate; and
forming source/drain regions in the recesses.

### Claim 2 (depends on 1)

The method of claim 1, further comprising forming spacers adjacent the gate electrode prior to the forming recesses.

### Claim 3 (depends on 2)

The method of claim 2, wherein the spacers have a width greater than about 30 nm.

### Claim 4 (depends on 1)

The method of claim 1, wherein the recesses have a depth greater than about 50 nm.

### Claim 5 (depends on 1)

The method of claim 1, wherein the recesses have a width greater than about 10 nm.

### Claim 6 (depends on 1)

The method of claim 1, wherein the forming the diffusion barrier includes forming a fluorine-rich silicon layer, a carbon-rich silicon layer, a nitrogen-rich silicon layer, or a combination thereof in the substrate in the recesses.

### Claim 7 (depends on 6)

The method of claim 6, wherein the fluorine-rich silicon layer has a thickness from about 1 nm to about 10 nm.

### Claim 8 (depends on 1)

The method of claim 1, wherein the forming the source/drain regions comprises epitaxially growing a silicon layer in the recesses and depositing a semiconductor alloy on the silicon layer.

### Claim 9

A method of forming a semiconductor device, the method comprising:
forming a gate electrode on a substrate;
recessing source/drain regions of the gate electrode;
forming a barrier layer in the substrate in the source/drain regions;
forming a first semiconductor layer in the source/drain regions;
forming a semiconductor alloy layer on the first semiconductor layer; and
annealing after the forming the first semiconductor layer and before the forming the semiconductor alloy layer.

### Claim 10 (depends on 9)

The method of claim 9, further comprising forming spacers adjacent the gate electrode prior to the recessing the source/drain regions.

### Claim 11 (depends on 10)

The method of claim 10, wherein the spacers have a width greater than about 30 nm.

### Claim 12 (depends on 9)

The method of claim 9, wherein the recessing comprises recessing the substrate in the source/drain regions for a depth greater than about 50 nm.

### Claim 13 (depends on 9)

The method of claim 9, wherein the recessing comprises recessing the substrate in the source/drain regions a width greater than about 10 nm.

### Claim 14 (depends on 9)

The method of claim 9, wherein the forming the barrier layer includes implanting fluorine ions, carbon ions, nitrogen ions, or a combination thereof in the substrate in the recesses.

### Claim 15 (depends on 9)

The method of claim 9, wherein the barrier layer has a thickness from about 1 nm to about 10 nm.

### Claim 16 (depends on 9)

The method of claim 9, wherein the forming the first semiconductor layer comprises epitaxially growing a silicon layer.

### Claim 17

A method of forming a semiconductor device, the method comprising:
providing a substrate;
forming a gate electrode on the substrate;
forming dummy spacers along opposing sides of the gate electrode;
recessing the substrate adjacent the dummy spacers, thereby forming recessed regions;
forming a barrier layer in the recessed regions of the substrate;
forming a first semiconductor layer in the recessed regions;
forming a second semiconductor layer on the first semiconductor layer, the second semiconductor layer having a different lattice structure than the first semiconductor layer; and
removing the dummy spacers after the forming the second semiconductor layer.

### Claim 18 (depends on 17)

The method of claim 17, wherein the forming the barrier layer comprises implanting fluorine ions, carbon ions, nitrogen ions, or a combination thereof in the recessed regions of the substrate.

### Claim 19 (depends on 17)

The method of claim 17, wherein the forming the first semiconductor layer comprises epitaxially growing a silicon layer.

### Claim 20 (depends on 17)

The method of claim 17, wherein the forming the second semiconductor layer comprises depositing silicon-germanium, silicon carbon, or silicon-carbon germanium.