# US 7,608,491 B2 · Method for manufacturing a SOI substrate associating silicon based areas and GaAs based areas

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- Number: US 7,608,491 B2
- Document ID: US7608491B2
- Status: Granted
- Kind: B2
- Application number: 11/959,924
- Filed: 2007-12-19
- Published: 2008-06-26
- Granted: 2009-10-27
- Earliest claimed: 2006-12-21
- Assignees: Commissariat a l'Energie Atomique
- Inventors: Laurent Clavelier; Chrystel Deguet
- Web page: https://patentgrep.com/patent/US7608491B2

## CPC

- H10F 71/127: {The active layers comprising only Group III-V materials, e.g. GaAs or InP}
- C30B 19/12: characterised by the substrate
- C30B 23/025: {characterised by the substrate}
- C30B 25/18: characterised by the substrate
- C30B 29/08: Germanium
- C30B 29/42: Gallium arsenide
- G02B 6/12004: {Combinations of two or more optical elements}
- G02B 6/43: Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
- H10D 84/08: using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
- H10D 86/201: {the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence)}
- H10P 14/271: {characterised by the preparation of substrate for selective deposition}
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/2926: {Crystal orientations}
- H10P 14/3211: {Silicon, silicon germanium or germanium}
- H10P 14/3418: {Phosphides}
- H10P 14/3421: {Arsenides}
- H10D 86/01: Manufacture or treatment
- H10P 14/263: {using melted materials}
- H10P 14/276: {Lateral overgrowth}
- Y02E 10/544: Solar cells from Group III-V materials
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- C30B: SINGLE-CRYSTAL GROWTH (by using ultra-high pressure, e.g. for the formation of diamonds, B01J3/06); UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL (zone-refining of metals or alloys C22B); PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (casting of metals, casting of other substances by the same processes or devices B22D; working of plastics B29; modifying the physical structure of metals or alloys C21D, C22F); SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE (for producing semiconductor devices or parts thereof H10); APPARATUS THEREFOR
- G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION

## Abstract

The invention relates to a method for manufacturing an SOI substrate, associating silicon based areas and areas of GaAs based material at the thin layer of the SOI substrate, the SOI substrate comprising a silicon support supporting successively a layer of dielectric material and a thin layer of silicon. The method comprises the following steps: supply of a SOI substrate comprising a silicon support mismatched by an angle of between 2° and 10° inclusive, the thin silicon based layer being oriented parallel to the plane (001) or (010), or (100) or (110) or (101) or (011) or (111), preservation of at least one area of the thin silicon layer, elimination of at least one non-preserved area of the thin silicon layer until the layer of dielectric material is revealed, opening, in said non-preserved area, of the layer of dielectric material until the silicon support is revealed, growth, from the silicon of the support revealed by said opening and by liquid phase epitaxy or by lateral epitaxy, of mismatched germanium on the layer of dielectric material revealed, growth of GaAs based material from the mismatched germanium obtained in the preceding step.

## Claims

### Claim 1

Method for manufacturing an SOI substrate associating at least one silicon based area (4′) and at least one GaAs based material area (8) at the thin layer (1) of the SOI substrate, the SOI substrate comprising a support (2) having a silicon face supporting successively a layer (3) of dielectric material and a thin silicon based layer (4), the method being characterised in that it comprises the following steps:
supply of a SOI substrate (1) comprising a support (2) having a silicon face mismatched by an angle of between 2° and 10° inclusive, the thin silicon based layer (4) being oriented parallel to the plane (001) or (010) or (100) or (110) or (101) or (011) or (111),
preservation of at least one area (4′) of the thin silicon based layer (4),
elimination of at least one non-preserved area of the thin layer of silicon until the layer (3) of dielectric material is revealed,
opening, in said non-preserved area, of the dielectric material layer (3) until the silicon face of the support (2) is revealed,
growth, from the silicon of the support (2) revealed by said opening (6) and by liquid phase epitaxy or by lateral epitaxy, of mismatched germanium (7) on the dielectric material layer revealed,
growth of the GaAs based material (8), from mismatched germanium (7) obtained in the preceding step.

### Claim 2 (depends on 1)

Method according to claim 1, in which the support (2) has a silicon face mismatched by an angle of between 4° and 8° inclusive.

### Claim 3 (depends on 2)

Method according to claim 2, in which the support (2) has a silicon face mismatched by an angle of 6°.

### Claim 4 (depends on 1, 2, 3)

Method according to any one of claims 1 to 3, in which the dielectric material layer (3) is a material chosen from among SiO2, Si3N4 and Al2O3.

### Claim 5 (depends on 1, 2, 3, 4)

Method according to any one of claims 1 to 4, in which the step of preserving at least one thin silicon layer area (4′) consists of depositing a protective layer (5) on said area of the thin silicon layer.

### Claim 6 (depends on 1, 2, 3, 4, 5)

Method according to any one of claims 1 to 5, also incorporating the preservation of at least one germanium area obtained by growth in the thin layer of the SOI substrate in order to prevent the growth there of GaAs based material.

### Claim 7 (depends on 1, 2, 3, 4, 5, 6)

Method according to any one of claims 1 to 6, in which at least one component is produced in said silicon area before the germanium growing step.

### Claim 8 (depends on 1, 2, 3, 4, 5, 6)

Method according to any one of claims 1 to 6, in which, after growing the GaAs based material, at least one component is produced initially in the silicon area, then at least one component in the area of GaAs based material.

### Claim 9 (depends on 6)

Method according to claim 6, in which at least one electronic component (11, 12) is produced in said silicon area, at least one receiver (14, 16) transforming an optical signal into an electrical signal is produced in said preserved germanium area, at least one emitter (13, 15) transforming an electrical signal into an optical signal is produced in said area of GaAs based material, at least one first optical guide (17) and a second optical guide (18) are produced from a preserved area of the thin layer of silicon, such that the first optical guide (17) can convey an optical signal to the receiver (14, 16) which transmits a corresponding electrical signal to an input of the electronic component (11, 12), and such that the second optical guide (18) can convey an optical signal corresponding to an electrical signal emitted by an output of the electrical component (11, 12) and transiting through the emitter (13, 15).