# US 7,608,370 B2 · Exposure mask and method for manufacturing semiconductor device using the same

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- Number: US 7,608,370 B2
- Document ID: US7608370B2
- Status: Granted
- Kind: B2
- Application number: 11/617,693
- Filed: 2006-12-28
- Published: 2007-12-27
- Granted: 2009-10-27
- Earliest claimed: 2006-06-27
- Assignees: Hynix Semiconductor Inc.
- Inventors: Sang Jun Han; Myung Goon Gil
- Web page: https://patentgrep.com/patent/US7608370B2

## CPC

- G03F 1/36: Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
- G03F 1/50: Mask blanks not covered by G03F1/20 - G03F1/34; Preparation thereof
- G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G)

## Abstract

An exposure mask of a semiconductor device comprises a substrate. Recesses are etched on a surface of the substrate to change a refractive index of an incident light. The changed refractive index causes a diffraction angle of the incident light to increase or decrease. As a result of the change in the diffraction angle, ultra fine patterns for highly integrated semiconductor devices may be formed without being adversely impacted by a proximity effect.

## Claims

### Claim 1

An exposure mask of a semiconductor device, the mask comprising:
a substrate;
a plurality of opaque patterns formed over the substrate; and
a plurality of transparent scratch patterns formed over the substrate between adjacent opaque patterns,
wherein the transparent scratch patterns include a plurality of recesses formed in a discrete step-wise manner, a circumference of each recess decreasing in discrete steps as a depth of the substrate increases.

### Claim 2 (depends on 1)

The exposure mask according to claim 1, wherein each opaque pattern is formed of chromium.

### Claim 3 (depends on 1)

The exposure mask according to claim 1, wherein each opaque pattern is a line/space pattern.

### Claim 4 (depends on 3)

The exposure mask according to claim 3, wherein the opaque patterns are formed at substantially the same pitch.

### Claim 5 (depends on 3)

The exposure mask according to claim 3, wherein the opaque patterns are formed at a first pitch and the transparent scratch patterns are formed at a second pitch, the second pitch being smaller than the first pitch.

### Claim 6 (depends on 3)

The exposure mask according to claim 3, wherein the opaque patterns are formed at a first pitch and a second pitch which are different from each other; and the transparent scratch patterns are formed at a third pitch, which is smaller than either the first or the second pitch.

### Claim 7 (depends on 6)

The exposure mask according to claim 6, wherein the transparent scratch patterns are formed over the substrate between the opaque patterns having the first pitch.

### Claim 8 (depends on 1)

The exposure mask according to claim 1, wherein the transparent scratch patterns are formed over the same surface of the substrate where the opaque patterns are formed.

### Claim 9 (depends on 1)

The exposure mask according to claim 1, wherein the transparent scratch patterns are formed on the same side as or the opposite side to the surface of the substrate where the opaque patterns are formed.

### Claim 10 (depends on 1)

The exposure mask according to claim 1, wherein the recesses are formed using a focused ion beam or a laser.

### Claim 11 (depends on 1)

The exposure mask according to claim 1, wherein the recesses are formed by an etching method.

### Claim 12 (depends on 1)

A method for manufacturing a semiconductor device, the method comprising the steps of:
forming a photoresist film over a semiconductor substrate;
performing an exposure process using the exposure mask of claim 1; and
performing a develop process to form a photoresist pattern.

### Claim 13 (depends on 1)

A method for manufacturing a semiconductor device, comprising the step of :
performing a lithography process employing the exposure mask of claim 1.

### Claim 14

An exposure mask of a semiconductor device, the mask comprising:
a substrate;
a plurality of opaque patterns formed over the substrate; and
a plurality of recess pattern formed over the substrate between adjacent opaque patterns, wherein the transparent scratch patterns include a plurality of recesses, a circumference of each recess decreasing as a depth of the substrate increases.

### Claim 15 (depends on 14)

The exposure mask according to claim 14, wherein the opaque patterns are formed at substantially the same pitch.

### Claim 16 (depends on 14)

The exposure mask according to claim 14, wherein the opaque patterns are formed at a first pitch and the recess pattern is formed at a second pitch, the second pitch being smaller than the first pitch.

### Claim 17 (depends on 14)

The exposure mask according to claim 14, wherein the opaque patterns are formed at a first pitch and a second pitch which are different from each other; and the transparent scratch patterns are formed at a third pitch which is smaller than either the first or the second pitch.

### Claim 18 (depends on 17)

The exposure mask according to claim 17, wherein the transparent scratch patterns are formed over the substrate between the opaque patterns having the first pitch.

### Claim 19 (depends on 14)

The exposure mask according to claim 14, wherein the transparent scratch patterns are formed over the same surface of the substrate where the opaque patterns are formed.

### Claim 20 (depends on 14)

The exposure mask according to claim 14, wherein the transparent scratch patterns are formed on same side as or the opposite side to the surface of the substrate where the opaque patterns are formed.
