# US 7,607,828 B2 · Methods and systems for protection from over-stress

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- Number: US 7,607,828 B2
- Document ID: US7607828B2
- Status: Granted
- Kind: B2
- Application number: 11/525,474
- Filed: 2006-09-22
- Published: 2008-03-27
- Granted: 2009-10-27
- Earliest claimed: 2006-09-22
- Assignees: Infineon Technologies AG
- Inventors: Robert Carl Beier; Raymond Joseph Notarantonio
- Web page: https://patentgrep.com/patent/US7607828B2

## CPC

- G06F 1/206: {comprising thermal management}
- H10W 40/00: Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

One embodiment of the invention relates to a circuit for over-stress protection. The circuit includes a temperature rate sensor configured to monitor the temperature of a semiconductor device during a first state. The circuit is further configured to selectively switch the semiconductor device from the first state to a second state if the temperature increases at a rate that has a predetermined relationship with a temperature rate function. Other methods and systems are also disclosed.

## Claims

### Claim 1

A circuit, comprising:
a temperature rate sensor configured to monitor the temperature of a semiconductor device during a first state and selectively switch the semiconductor device from the first state to a second state if the temperature increases at a rate that has a predetermined relationship with a temperature rate function, the temperature rate sensor comprising:
a temperature sensor configured to provide the temperature of the semiconductor device;
a differentiator configured to provide a differentiated temperature by differentiating the temperature; and
a comparator configured to compare the differentiated temperature to an adjustable reference level representative of the temperature rate function, and to provide a comparator output value therefrom; and
a logic circuit that is coupled to an output node of the comparator, wherein the logic circuit utilizes the comparator output value to provide a logic control signal to switch the semiconductor device from the first state to the second state.

### Claim 2 (depends on 1)

The circuit of claim 1 wherein the semiconductor device comprises a MOSFET.

### Claim 3

A circuit for protection from over-stress, comprising:
a temperature rate sensor configured to monitor a temperature of a semiconductor device and selectively provide an output signal based on whether the temperature increases at a rate that has a predetermined relationship with a temperature rate function;
an integrator configured to, based on the output signal, selectively integrate the temperature during an integration period; wherein the semiconductor device is turned off if the integrated temperature measured over the integration period has a predetermined relationship with an integrator reference level.

### Claim 4 (depends on 3)

The circuit of claim 3, further comprising:
an inductor configured to generate flyback energy when turned from an on-state to an off-state by the semiconductor device;
wherein the circuit is configured to provide a diagnostic fault flag if the flyback energy causes the rate of temperature increase to have the predetermined relationship with the temperature rate function.

### Claim 5 (depends on 3)

The circuit of claim 3, wherein the temperature rate sensor comprises:
a temperature sensor configured to provide the temperature of the semiconductor device; and
a differentiator configured to aid in designating the start of the integration period.

### Claim 6 (depends on 5)

The circuit of claim 5 wherein the temperature rate sensor further comprises:
a comparator configured to compare an output of the differentiator to a reference level, and to provide a comparator output value therefrom; and
a time period circuit configured to receive the comparator output value and provide the integration period therefrom.

### Claim 7 (depends on 6)

The circuit of claim 6 wherein the temperature rate sensor further comprises:
a second comparator configured to compare the integrated temperature to an integrator temperature function, and provide a second comparator output value therefrom;
wherein the second comparator output value can facilitate switching the semiconductor device from a first state to a second state.

### Claim 8

A method for protecting a semiconductor device from over-stress, comprising:
monitoring the temperature of a semiconductor device during an on-state;
comparing a temperature rate associated with the monitored temperature to a temperature rate function;
selectively integrating the temperature of the semiconductor device over a time window, where the selective integration is based on the comparison of the temperature rate to the temperature rate function; and
comparing the integrated temperature to an integrator reference level to facilitate switching the device from the on-state to an off-state.

### Claim 9 (depends on 8)

The method of claim 8, wherein the integrating starts at a time related to when the monitored temperature favorably compares to the temperature rate function.

### Claim 10 (depends on 9)

The method of claim 9, further comprising:
measuring the absolute temperature of the semiconductor device; and
switching the semiconductor device to an off-state if the absolute temperature exceeds a maximum temperature.

### Claim 11

A circuit for protection from over-stress, comprising:
means for monitoring the temperature of a semiconductor device during an on-state and for comparing a temperature rate associated with the monitored temperature to a temperature rate function; and
circuitry to facilitate switching the semiconductor device from a first state to a second state if the temperature rate favorably compares to the temperature rate function;
integration means for integrating the temperature of the semiconductor device over a time window; and
means for providing an enabling signal that is representative of the time window for which integration is carried out.

### Claim 12 (depends on 11)

The circuit of claim 11, further comprising:
means for comparing the integrated temperature to a integrated temperature function to facilitate switching the device from the on-state to an off-state.

### Claim 13 (depends on 12)

The method of claim 12, further comprising:
diagnostic circuitry for delivering a diagnostic signal from the circuit, wherein the diagnostic signal is indicative of an excessive temperature in the circuit.

### Claim 14

A circuit for protection from over-stress, comprising:
a temperature rate sensor configured to monitor a temperature of a semiconductor device and integrate the temperature during an integration period, the temperature rate sensor comprising:
a temperature sensor configured to provide the temperature of the semiconductor device;
a differentiator configured to aid in designating the start of the integration period; and
an integrator configured to integrate the temperature during the integration period;
wherein the integration period relates to a time at which a rate of temperature increase has a pre-determined relationship with a temperature rate function.

### Claim 15

A circuit for protection from over-stress, comprising:
a temperature rate sensor configured to monitor a temperature of a semiconductor device and integrate the temperature during an integration period;
wherein the integration period relates to a time at which a rate of temperature increase has a pre-determined relationship with a temperature rate function; and
an inductor configured to generate flyback energy when turned from an on-state to an off-state by the semiconductor device;
wherein the circuit is configured to provide a diagnostic fault flag if the flyback energy causes the rate of temperature increase to have the predetermined relationship with the temperature rate function.
