Memory management method for simultaneously loading and executing program codes
AssigneeMediatek Incorporation
InventorsLi-Chun Tu, Ping-Sheng Chen
Life of this patent
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Abstract
A method is provided for simultaneously loading and executing program code in a circuit system. The circuit system includes a plurality of memory devices, a microprocessor, and a loading circuit. The method includes dividing the program code into a plurality of code divisions and utilizing the microprocessor to execute at least a code division when the loading circuit loads any other code division into a memory device of the plurality of memory devices.
Claims19
A method for loading and executing program code in a circuit system, the circuit system comprising a plurality of memory devices, a microprocessor, and a loading circuit, the method comprising:
- dividing the program code into a plurality of code divisions;
- and
- when the loading circuit loads a code division into one of the memory devices, utilizing the microprocessor to execute at least one other code division;
- wherein the program code comprises the at least one other code division and a remaining portion, the remaining portion of the program code comprises the code division, and the remaining portion of the program code is not executed by the microprocessor until the remaining portion of the program code is completely loaded by the loading circuit.
A method for loading and executing program code in a circuit system, the circuit system comprising a first memory device, a second memory device, a microprocessor, and a loading circuit, the method comprising:
- (a) utilizing the first memory device to store the program code wherein the program code comprises a first code division and a remaining portion and the remaining portion of the program code comprises a second code division;
- (b) utilizing the loading circuit to load the first code division from the first memory device into the second memory device;
- (c) utilizing the microprocessor to access the second memory device for executing the first code division, wherein the remaining portion of the program code is not executed by the microprocessor until the remaining portion of the program code is completely loaded by the loading circuit;
- and
- (d) during step (c), utilizing the loading circuit to load the second code division from the first memory device into the second memory device.
A method for loading and executing program code in a circuit system, the circuit system comprising a first memory, a second memory, a third memory, a microprocessor, and a loading circuit, the method comprising:
- (a) utilizing the first memory device to store the program code wherein the program code comprises a first code division and a remaining portion and the remaining portion of the program code comprises a second code division;
- (b) utilizing the loading circuit to load the first code division from the first memory device into the third memory device;
- (c) utilizing the microprocessor to access the third memory device for executing the first code division, wherein the remaining portion of the program code is not executed by the microprocessor until the remaining portion of the program code is completely loaded by the loading circuit;
- and
- (d) during step (c), utilizing the loading circuit to load the second code division from the first memory device into the second memory device.
A method for loading and executing program code in a circuit system, the circuit system comprising a third memory device, a first memory device, a second memory device, a microprocessor, and a loading circuit, the program code comprising a first code division and a remaining portion, the remaining portion of the program code comprising a second code division, the method comprising:
- (a) utilizing the third memory device to store the second code division;
- (b) utilizing the second memory device to store the first code division;
- (c) utilizing the loading circuit to load the second code division from the third memory device into the first memory device;
- and
- (d) during step (c), utilizing the microprocessor to access the second memory device for executing the first code division, wherein the remaining portion of the program code is not executed by the microprocessor until the remaining portion of the program code is completely loaded by the loading circuit.
Dependencies are inferred from the claim text.