Array type operation device

An array calculation device comprising:

• a processor array of a two dimensional array structure in which processor elements are arranged in M lines by N columns, wherein N pieces of processor elements in each line are connected by signal lines, and the processor elements are connected so that a calculation result of each processor element is transferred to a processor element of a next line;
• a basic control information generating unit operable to generate basic control information in each cycle;
• an instruction acquiring unit operable to acquire an instruction in each cycle;
• a first unit operable to generate, in each cycle, operation control information for controlling an operation of a processor element of a first line, in accordance with the basic control information generated by the basic control information generating unit, and then generate an instruction to the first line in accordance with the operation control information and the instruction acquired by the instruction acquiring unit;
• and
• a second unit operable to generate, in each cycle, operation control information for controlling an operation of each processor element of 2-M lines, in accordance with operation control information generated for controlling an operation of a processor element of an immediately preceding line, and then generate an instruction to each processor element of 2-M lines, in accordance with the operation control information generated by the second unit in each cycle and the instruction acquired by the instruction acquiring unit, wherein
• the N pieces of processor elements in each line of the processor array execute an instruction to the line.