Methods in a pseudo random and command driven bit compensation for the cycling effects in flash memory

In a non volatile NAND flash memory, a method comprising:

• upon receiving a user command to program or read user data in the memory, triggering application of a code comprising a plurality of pseudo random bits to a block of user data to randomize encoding of the user data, each of the bits of the code determining whether a corresponding group of one or more pages of the block is stored as is or is inverted prior to being stored, and wherein the code is stored in the array along with the corresponding group;
• loading the stored code into a shift register;
• on the rising edge of a user generated command signal, causing the shift register to shift to next bit;
• monitoring a value stored in a location of the shift register;
• for a first value in the monitored location of the shift register, inverting encoding scheme of a portion of user data;
• and
• for a second value in the monitored location of the shift register, leaving as is the encoding scheme of the portion of user data.

In a non volatile NAND flash memory chip comprising a plurality of pages of user data, a method comprising:

• providing a first signal generated by the flash memory chip, said first signal having a timing alternating between two states;
• upon receiving a user command at the chip having a second signal, the second signal having a timing not synchronized to the timing of the first signal, using the second signal as a timing reference to time the first signal to obtain the state of the first signal at the referenced time as a polarity code value;
• wherein the polarity code is stored in the flash memory chip along with a corresponding portion user data and
• if the value is in the first state when referenced, inverting encoding scheme of a portion of user data,
• else if the value is in the second state when referenced, leaving as is the encoding scheme of the portion of user data.