Method for operating serial flash memory
AssigneeElite Semiconductor Memory Technology Inc.
InventorChung Zen Chen
Life of this patent
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Abstract
A transmission method for a serial periphery interface (SPI) serial flash includes the steps of providing a first system clock signal and transmitting a plurality of data strings with each two bits of the data strings transmitted in a period of the first system clock signal. A second system clock signal is generated by the first system clock signal to provide a double frequency to enhance the transmission rate of all the data inputted into or outputted from the SPI serial flash.
Claims15
A transmission method for a serial periphery interface (SPI) serial flash, comprising the steps of:
- providing a first system clock signal with a first frequency;
- doubling the first frequency of the first system clock signal to form a second system clock signal with a second frequency;
- and
- transmitting a plurality of data strings bit by bit permanently with the second system clock signal,
- wherein the data strings comprise a read command and an address, which are transmitted through an input pin, and
- the read command and the address are transmitted into the SPI serial flash in eight periods and twenty-four periods, respectively, of the second system clock signal.
A transmission method for a serial periphery interface (SPI) serial flash, comprising the steps of:
- providing a first system clock signal with a first frequency;
- doubling the first frequency of the first system clock signal to form a second system clock signal with a second frequency;
- and
- transmitting a plurality of data strings bit by bit permanently with the second system clock signal,
- wherein the data strings comprise a program command, an address, and programmed data, and
- the program command and the address are transmitted to the SPI serial flash in eight and 24 periods, respectively, of the second system clock signal.
A transmission method for a serial periphery interface (SPI) serial flash, comprising the steps of:
- providing a first system clock signal with a first frequency;
- doubling the first frequency of the first system clock signal to form a second system clock signal with a second frequency;
- and
- transmitting a plurality of data strings bit by bit permanently with the second system clock signal,
- wherein the data strings comprise an erase command and an address, and
- the erase command and the address are transmitted into the SPI serial flash in eight periods and 24 periods, respectively, of the second system clock signal.
Dependencies are inferred from the claim text.